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macro-modeling for polysilicon cascaded bent beam electrothermal microactuators

SENSORS AND ACTUATORS A-PHYSICAL 2006年第1期128卷 165-175页

作者： Zhang, YX Huang, QA Li, RG Li, WH SE Univ Minist Educ Key Lab MEMS Nanjing 210096 Peoples R China

A comprehensively thermal-electro-mechanical analytical model which can precisely predict the performance of polysilicon cascaded bent beam electrothermal actuators has been presented in this paper. This model has taken into account various modes of heat dissipations such as heat loss to circumstance by convection and radiation and to substrate by conduction through trapped air volumes with a temperature range from 300 to 800 K. Furthermore, the influences result from temperature dependent physical parameters of polysilicon are also considered. The model is validated by both 3D-FEA model simulations and available experimental data. With this model, the tip displacement as a function of geometrical dimension as well as many other physical parameters of polysilicon cascade bent beam actuator can be accurately simulated. Moreover, optimization means for achieving high performance of cascaded bent beam actuators are provided based on the theoretical model. (c) 2005 Elsevier B.V. All rights reserved.

关键词： cascaded bent beam electrothermal microactuator polysilicon macro-modeling MEMS

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macro-modeling of high-speed digital board to package interconnections

Macro-modeling of high-speed digital board to package interc...

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IEEE MTT-S International Microwave Symposium

作者： Kim, Jung-Min Du, Jin-Kyoung Kim, Yong-Ju Kim, Hyungsoo Park, Kun-Woo Kih, Joong-Sik Yook, Jong-Gwan Yonsei Univ Dept Elect & Elect Engn Seoul 120749 South Korea Hynix Semicond Inc Div Mem R&D Signal Integrity Part Ichon South Korea

ISBN: (纸本)9780780395411

The pole and residue values from vector fitting method were applied in this paper, which enables the extraction and implementation of the equivalent circuit to achieve the characteristics of board to package model for GHz frequency range. After the full-wave EM simulation of package model, the mathematical functions are derived by the frequency domain responses of EM simulation. The equivalent circuit model and simulation show good correlation, further verifying the accuracy of the simulated EM data and extracted circuit model. Fourier series of clock pulse to the extracted equivalent circuit provides an approach to tremendously reduced simulation time of the frequency and time domain for the high-speed digital system.

关键词： vector fitting macro-modeling package model time domain simulation frequency domain EM simulation

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A novel broadband macro-modeling using piecewise vector fitting

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IEEJ TRANSACTIONS ON ELECTRICAL AND ELECTRONIC ENGINEERING 2017年第1期12卷 80-86页

作者： Zhang, Weidong Xie, Shuguo Beihang Univ Elect & Informat Engn Dept 37 XueYuan Rd Beijing 100191 Peoples R China

For broadband frequency domain responses of highly dynamical systems, because vector fitting always has low accuracy especially at resonant frequency response points, a new piecewise vector fitting algorithm is proposed. The complete broadband frequency range is divided into a number of sections. Vector fitting is then applied to each section to identify the poles and residues. Through frequency partitioning, the numerical conditioning of the pole and residue identification equations is improved. Then in each section a sub-macromodel is obtained. Finally, by adding up the sub-macromodels in each section, a novel broadband macro-model with high accuracy is obtained for the whole broadband frequency domain. At the same time, to reduce redundant poles, in each section the number of poles is controlled by a predefined fitting error. An illustrative example involving a low-pass filter is presented for validation of the proposed method. (c) 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.

关键词： vector fitting frequency domain macro-modeling piecewise

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Library based macro-modeling methodology for Through Silicon Via (TSV) arbitrary arrays

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MICROELECTRONICS JOURNAL 2015年第12期46卷 1291-1303页

作者： Ali, Karim Yahya, Eslam Elrouby, Alaa Ismail, Yehea Amer Univ Cairo CND Zewail City Sci & Technol Cairo Egypt Cairo Univ Mentor Graph Fac Engn Elect & Commun Dept Cairo Egypt Benha Univ Benha Fac Engn Banha Egypt

In this paper, a novel library-based macro-modeling technique is developed to extract equivalent RLGC model which is spice compatible for TSV arrays of any size N x M. The built model accounts for Through Silicon Via (TSV) parasitic dependence on the array structural parameters and the frequency dependent properties of the silicon substrate. The developed macro-model constructs an equivalent parasitic matrix that could be used by circuit simulators to estimate the maximum signal frequency as well as noise in the TSV array. The key idea of the macro-model is to partition any given TSV arrays into smaller and fixed-size arrays. Smaller arrays are characterized and their parasitic are stored in the library. Using a divide and conquer technique, the final solution of the TSV array is produced. A detailed comparison of the proposed macro-modeling technique against the parasitic extracted by microwave simulation, for different structures with different sizes, shows a maximum error of 10% and an average error of 5%. Furthermore, the performance of library based macro-modeling is order of magnitude faster than the microwave simulation. (C) 2015 Elsevier Ltd. All rights reserved.

关键词： TSV arrays macro-modeling 3D IC SiP and SoC

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Blackbox macro-modeling of the Nonlinearity Based on Volterra Series Representation of X-Parameters 23

Blackbox Macro-modeling of the Nonlinearity Based on Volterr...

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23rd IEEE Conference on Electrical Performance of Electronic Packaging and Systems

作者： Xiong, Xiaoyan Y. Z. Jiang, Li Jun Schutt-Aine, Jose E. Chew, Weng Cho Univ Hong Kong Dept Elect & Elect Engn Pokfulam Rd Hong Kong Hong Kong Peoples R China Univ Illinois Dept Elect & Comp Engn Urbana IL 61801 USA

ISBN: (纸本)9781479936434

Volterra series representation is a powerful mathematical model for nonlinear devices. However, the difficulties in determining higher-order Volterra kernels limited its broader applications. This paper proposed a systematic approach that enables a convenient extraction of Volterra kernels from X-parameters for the first time. Then the Vandermonde method is employed to separate different orders of Volterra kernels at the same frequency, which leads to a highly efficient extraction process. The proposed Volterra series representation based on X-parameters is further benchmarked for verification. The proposed new algorithm is very useful for the blackbox macro-modeling of nonlinear devices and systems.

关键词： Volterra series X-parameters macro-modeling

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DSMM'19: The 5th Workshop on Data Science for macro-modeling with Financial and Economic Datasets 19

DSMM'19: The 5th Workshop on Data Science for Macro-modeling...

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ACM SIGMOD International Conference on Management of Data (SIGMOD)

作者： Burdick, Douglas Krishnamurthy, Rajasekar Raschid, Louiqa IBM Res Almaden San Jose CA 95120 USA IBM Watson Armonk NY USA Univ Maryland College Pk MD 20742 USA

ISBN: (纸本)9781450356435

DSMM 2019 will explore the challenges of macro-modeling with financial and economic datasets. The workshop will also showcase the 2019 Financial Entity Identification and Information Integration (FEIII) Challenge which involves two challenge tasks, one over small business data and the other over customs data for shipping manifests.

关键词： Data Science macro-modeling Financial entities Entity Resolution

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Processing Power Estimation of Simple Wireless Sensor Network Nodes by Power macro-modeling

Processing Power Estimation of Simple Wireless Sensor Networ...

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International Conference on Computer Engineering and Technology

作者： Rafiee, M. Ghaznavi-Ghoushchi, M. B. Seyfe, B. Shahed Univ Dept Elect Engn Tehran Iran

ISBN: (纸本)9780769535210

The operation of wireless sensor networks is fundamentally constrained by available energy sources. In this paper, we propose a numerical power estimation technique for register transfer level. This technique allows estimating the power dissipation of components in WSN1 to their statistical knowledge of primary inputs/outputs. During power estimation procedure, the sequence of an input stream is generated using input metrics and numerical macro-model function is used to construct a set of functions that maps the input metrics of a module to its output metrics. Then, simulation is performed and power dissipation is predicted by a macro-model function. The results are effective and highly correlated, with average error of 3.5%.

关键词： component Wireless Sensor Networks Processing Power macro-modeling

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macro-modeling and energy efficiency studies of file management in embedded systems with flash memory

Macro-modeling and energy efficiency studies of file managem...

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作者： Goyal, Nitesh Texas A&M University

Technological advancements in computer hardware and software have made embedded systems highly affordable and widely used. Consumers have ever increasing demands for powerful embedded devices such as cell phones, PDAs and media players. Such complex and feature-rich embedded devices are strictly limited by their battery life- time. Embedded systems typically are diskless and use flash for secondary storage due to their low power, persistent storage and small form factor needs. The energy efficiency of a processor and flash in an embedded system heavily depends on the choice of file system in use. To address this problem, it is necessary to provide sys- tem developers with energy profiles of file system activities and energy efficient file systems. In the first part of the thesis, a macro-model for the CRAMFS file system is established which characterizes the processor and flash energy consumption due to file system calls. This macro-model allows a system developer to estimate the energy consumed by CRAMFS without using an actual power setup. The second part of the thesis examines the effects of using non-volatile memory as a write-behind buffer to improve the energy efficiency of JFFS2. Experimental results show that a 4KB write-behind buffer significantly reduces energy consumption by up to 2-3 times for consecutive small writes. In addition, the write-behind buffer conserves flash space since transient data may never be written to flash.

关键词： Embedded Flash File Systems macro-modeling Book Thesis

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A macro-modeling Approach For Through Silicon Via

A Macro-Modeling Approach For Through Silicon Via

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IEEE EUROCON Conference

作者： Salah, Khaled Ragai, Hani Ismail, Yehea Mentor Graph Corp Cairo Egypt Ain Shams Univ Cairo Egypt AUC Univ Cairo Egypt

ISBN: (纸本)9781467322324;9781467322300

modeling parasitic parameters of Through-Silicon Via (TSV) structures is essential in exploring electrical characteristics such as delay and signal integrity (SI) of circuits and interconnections in three-dimensional (3D) Integrated Circuits (ICs). This paper presents a complete set of self-consistent equations including self and coupling terms for capacitance of general multi-TSV structures. The error when using the closed form expressions as compared to a field solver is less than 7%. As TSV parasitic capacitance is less than other conventional IO structures' capacitance, therefore TSV technology results in lower I/O power consumption, which makes it suitable for low power applications.

关键词： Three-Dimensional ICs Through Silicon Via modeling TSV Dimensional Analysis macro-modeling

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NoC Router Power macro-modeling at High Level

NoC Router Power Macro-modeling at High Level

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2nd International Conference on Advances in Computer Science and Engineering (CES 2012)

作者： Zhou, Fang Wu, Ning Zhang, Ying Ge, Xin Nanjing Univ Aeronaut & Astronaut Dept Elect Engn Nanjing Jiangsu Peoples R China China Telecom Nanjing Peoples R China

ISBN: (纸本)9783642279478;9783642279485

This paper proposes a methodology for power extraction of the Network-on-Chip router. The router power model is devoted to overcoming the shortcoming of existing architecture-level power simulators with higher accuracy and providing a fast and precise power profile to enable power optimization such as power-aware compiler, core mapping, and scheduling techniques. Each component of the router is modeled by different methods according to different characteristics. Multiple linear regression is used to model the relationship between events occurring in the NoC and energy consumption. Using the EDA platform of Synopsys and SMIC 180nm standard cell library, we compare our power model to the gate-level power analysis by PrimeTime PX. Experimental results show that the average estimation error of the proposed power model is 5.0% against the gate-level simulation with 600 times speed up.

关键词： NoC router power macro-modeling

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