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22nd Iranian Conference on Electrical Engineering (ICEE)

作者： Moghadas, Maryam Hashemi, Mahmoud Reza Univ Tehran Coll Engn Sch Elect & Comp Engn Multimedia Proc Lab Tehran Iran

ISBN: (纸本)9781479944095

Media clouds provide an infrastructure for distributed processing and storage of multimedia applications. Each device in the media cloud is usually a mobile system consisting of several heterogeneous Processing Elements (PE). Energy efficiency has always been a challenge in this environment. In this paper, we propose a unified energy efficient algorithm for mapping multimedia applications on a media cloud infrastructure. The algorithm considers the distribution of tasks at two levels: among devices in the cloud and PEs of each device. The proposed algorithm heuristically finds the most energy efficient device for each task at the first stage. In the second stage, the least energy consuming PE among all available PEs is chosen for mapping. The efficiency of the proposed scheme has been evaluated by mapping H.264/AVC decoder on a media cloud. Simulation results indicate that by offloading application tasks on more power efficient PEs, the overall energy consumption for this application would be reduced by up to 12 times in a typical scenario in comparison to local processing. Meanwhile, the performance of the heuristic has been compared to the optimal solution.

关键词： mapping algorithms Multimedia application Media Cloud MPSoC

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Run-time mapping of multiple communicating tasks on MPSoC platforms

Run-time mapping of multiple communicating tasks on MPSoC pl...

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International Conference on Computational Science (ICCS)

作者： Singh, Amit Kumar Jigang, Wu Kumar, Akash Srikanthan, Thambipillai Nanyang Technol Univ Sch Comp Engn Singapore Singapore Natl Univ Singapore Dept Elect & Comp Engn Singapore 117548 Singapore

Multi-task supported processing elements (PEs) are required in a Multiprocessor System-on-Chip platform for better scalability, power consumption etc. Efficient utilization of PEs needs intelligent mapping of tasks onto them. The job becomes more challenging when the workload of tasks is dynamic. These scenarios require tasks to be mapped at run-time. This paper presents a run-time mapping technique for efficiently mapping the tasks of applications on the multitasking resources. The technique tries to map the communicating tasks onto the same processing resource and also the tasks of an application close to each other in order to reduce the communication overhead. For an evaluated scenario, the presented technique reduces total execution time by 22%, average channel load by 47% and power dissipation by 48% when compared to state-of-the-art run-time mapping techniques. (C) 2010 Published by Elsevier Ltd.

关键词： Multiprocessor System-on-Chip (MPSoC) Network-on-Chip (NoC) mapping algorithms

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Arbitrated IP Core Based Dynamic Task mapping Algorithm for Networks-on-Chip 7

Arbitrated IP Core Based Dynamic Task Mapping Algorithm for ...

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7th International Conference on Computational Intelligence, Communication Systems and Networks

作者： Kumar, Arvind Johari, Suchi Sehgal, Vivek Kumar Jaypee Univ Informat Technol Dept CSE & IT Solan HP India

ISBN: (纸本)9781467370165

mapping of the tasks onto the core is the main aim of the paper. So there is need to design such an algorithm that the tasks should not wait in the queue for long time. Our main focus is to design an algorithm that should concentrate on the load balancing, such that the problem of overheating of the cores is reduced. For this purpose different researchers have given different mapping algorithms. It would be the best solution if the designed algorithm could balance the load dynamically over the grid of cores. In this paper, we have mapped the tasks onto the cores such that performance of the network improves along with balanced load distribution. In experimental results, the proposed AICM approach is compared with sequential mapping considering 5X5 mesh topology.

关键词： Networks-on-chip mapping algorithms Load balancing

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Preprocessing-based Run-time mapping of Applications on NoC-based MPSoCs

Preprocessing-based Run-time Mapping of Applications on NoC-...

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IEEE-Computer-Society Annual Symposium on VLSI (ISVLSI)

作者： Kaushik, Samarth Singh, Amit Kumar Srikanthan, Thambipillai Nanyang Technol Univ Ctr High Performance Embedded Syst Singapore Singapore

ISBN: (纸本)9780769544472

Design-time strategies are suited only for mapping predefined set of applications and thus cannot predict dynamic behavior. This dynamism demands run-time mapping of application tasks to maintain a critical balance between performance and resource optimization. This paper proposes a run-time heuristic that intelligently distributes the application tasks among multiple processors taking communication overhead, computation load and resource utilization in consideration.

关键词： Multiprocessor System-on-Chip (MPSoC) Network-on-Chip (NoC) mapping algorithms

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A new model for static mapping of parallel applications with task and data parallelism 16

A new model for static mapping of parallel applications with...

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16th International Parallel and Distributed Processing Symposium, IPDPS 2002

作者： Roig, C. Ripoll, A. Senar, M.A. Guirado, F. Luque, E. Universitat de Lleida Dept. of CS Jaume II 69 Lleida25001 Spain Universitat Autònoma de Barcelona Dept. of CS BellaterraBarcelona08193 Spain

ISBN: (纸本)0769515738

The efficient mapping of parallel tasks is essential in order to exploit the gain from parallelisation. In this work, we focus on modelling and mapping message-passing applications that are defined by the programmer with an arbitrary interaction pattern among tasks. A new model is proposed, known as TTIG (Temporal Task Interaction Graph), which captures not only computation and communication costs, but also the percentages of concurrency between tasks. From this model, a mapping strategy is developed that minimises expected execution time by properly exploiting task parallelism. The effectiveness of this approach has been proven for a real image-processing application on a cluster of PCs. © 2002 IEEE.

关键词： mapping algorithms mapping of image-processing application modelling message-passing applications static mapping task and data parallelism

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Hypercube algorithms on mesh connected multicomputers

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IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 2002年第12期13卷 1247-1260页

作者： de Cerio, LD Valero-García, M González, A Univ Politecn Catalunya Dept Comp Architecture Barcelona Spain

A new methodology named CALMANT (CC-cube algorithms on Meshes and Ton) for mapping a kind of algorithms that we call CC-cube algorithm onto multicomputers with hypercube, mesh, or torus interconnection topology is proposed. This methodology is suitable when the initial problem can:be expressed as a set of processes that communicate through a hypercube topology (a CC-cube algorithm). There are many important algorithms that fit into the CC-cube type. CALMANT is based on three different techniques: a) the standard embedding to assign the processes of the algorithm to the nodes of the mesh multicomputer;b) the communication pipelining technique to increase-the level of communication parallelism inherent in the CC-cube algorithms;and c) optimal message-scheduling algorithms proposed in this work in order to avoid conflicts and minimizing in this way the communication time. Although CALMANT is proposed for multicomputers with different interconnection network topologies, this paper only focuses on the particular case of meshes.

关键词： mapping algorithms hypercube algorithms mesh interconnected multicomputers standard embedding communication pipelining message-scheduling algorithms complete exchange

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Generation of sub-pixel-level maps for mixed pixels in hyperspectral image data

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CURRENT SCIENCE 2021年第1期120卷 166-176页

作者： Kumar, Prem Chakravortty, Somdatta Maulana Abul Kalam Azad Univ Technol Haringhata 721249 Nadia India

Hyperspectral data can find wide applications in classification and mapping of pure and mixed pixels in images of different land-cover types. Hyperspectral data of high spectral resolution enhance discrimination of target objects;but the low spatial resolution poses a challenge due to creation of mixed pixels. The cost of acquiring images at high resolution from sensors is high and rarely available. With images of coarser spatial resolution, it is difficult to identify the endmembers and their locations within the mixed pixel. This study utilizes the fractional abundance values of target endmembers obtained from linear spectral unmixing in locating the sub-pixels of a mixed pixel. The study illustrates the preparation of classified maps of finer spatial resolution by locating the sub-pixels through different mapping algorithms. A comparative analysis of these mapping algorithms, viz. attraction model-based sub-pixel mapping, simulated annealing, neighbourhood connectivity, cosine similarity-based mapping and Markov random field-based mapping has been made and an output generated. The algorithms have been implemented on standard hyperspectral datasets of Indian Pines having 200 spectral channels, Pavia University of 103 spectral channels and Jasper Ridge of 198 spectral channels. It has been observed that simulated annealing-based mapping produces higher accuracy rate than the other algorithms, whereas in terms of execution time, attraction model takes lesser time. The accuracy has been validated with the ground reference map of available standard hyperspectral datasets on which each algorithm has been tested and analysed.

关键词： Hyperspectral data mapping algorithms pure and mixed pixels spectral channels

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Embedding classical communication topologies in the scalable OPAM architecture

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IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 1996年第9期7卷 979-992页

作者： Barak, A Schenfeld, E NEC RES INST PRINCETONNJ 08540

This paper presents novel embeddings of various classical topologies into the OPAM multicomputer. OPAM consists of a large number of processors that are connected by a two level, crossbar based interconnection network. The network combines a large, optical circuit-switched crossbar (reconfigurable network), with many small, packet-switching crossbars. The needed embedding is very different than the classical approaches. The goal in our case is to minimize routing decisions, so that communication requests can be satisfied by passing through two small crossbars. We show how to map parallel programs to this architecture using graph contraction notations. The family of parallel programs that we consider consists of multiple processes and communication links that are represented by connected, regular graphs such as rings, trees, two dimensional grids, cube connected cycles and hypercubes. In each case we show how to partition the vertex set of the program's graph to subsets, and how to assign each subset a cluster of processors in order to realize the topology of the given problem. In some of the cases we also prove that our partition and assignment algorithms are optimal.

关键词： graph contractions graph embeddings interconnection networks mapping algorithms parallel programs

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Algorithmic detection of the beginning and end of bipolar electrograms: Implications for novel methods to assess local activation time during atrial tachycardia

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BIOMEDICAL SIGNAL PROCESSING AND CONTROL 2013年第6期8卷 981-991页

作者： El Haddad, Milad Houben, Richard Stroobandt, Roland Van Heuverswyn, Frederic Tavernier, Rene Duytschaever, Mattias Univ Ghent Dept Internal Med B-9000 Ghent Belgium Appl Biomed Syst Maastricht Netherlands Univ Hosp Ctr Heart Dept Electrophys B-9000 Ghent Belgium St Jan Hosp Bruges Dept Cardiol Brugge Belgium

Activation mapping is required to effectively ablate atrial tachycardia (AT). Conventional tools to assess local activation time (LAT) are based upon the peak of the bipolar electrogram (B-EGM, LAT(Peak)) and the maximal negative slope of the unipolar electrogram (U-EGM, LAT(Slope)). Bipolar electrograms are influenced by wavefront direction, bipole orientation, and inter-electrode spacing causing ambiguity in peak detection, whereas unipolar electrograms are disturbed by the presence of far-field signals. We developed a new algorithm to detect the beginning and end of bipolar electrograms (t(begin) and t(end)). Then, we introduced new LAT methods related to the onset of B-EGMs (LAT(onset)), the center of mass of B-EGMs (LAT(CoM)), and the slope of U-EGMs within a pre-defined window (LAT(Slope-hybrid)). In total 3752 recordings from 31 AT patients were retrospectively analyzed. The signal-to-noise ratio (SNR) for B-EGMs was calculated to differentiate algorithmically high from low quality electrograms (HQ and LQ). In a subset of 328 B-EGMs, five experts validated the t(begin) as determined by the algorithm by visual rating. The newly developed LAT methods were compared to the conventional LAT methods and to one another (Bland-Altman plots) in both HQ (n =3003) and LQEGMs (n = 749). The t(begin) algorithm was accurate (deviation <+/-10 ms) in 96 +/- 4% of HQ and 91 +/- 8% of LQ B-EGMs. BA plots revealed the following difference (bias) and variation in HQ and LQEGMs respectively: (1) LAT(Onset) vs. LAT(Peak): 27 +/- 30 ms and 24 +/- 62 ms;(2) LAT(CoM) vs. LAT(Peak): 0 +/- 16 ms and 2 +/- 38 ms;(3) LAT(Slope-hybrid) vs. LAT(Slope): 1 +/- 32 ms and 15 +/- 110 ms;(4) LAT(Onset) vs. LAT(CoM): 22 +/- 24 ms and 18 +/- 22 ms;(5) LAT(Onset) vs. LAT(Slope-hybrid): 16 +/- 18 ms and 13 +/- 22 ms;and (6) LAT(CoM) vs. LAT(Slope-hybrid): 5 +/- 20 ms and 4 +/- 18 ms. In the present study, we introduced three new methods to assess local activation time in AT, based upon an algorithm

关键词： Atrial tachycardia (AT) mapping algorithms Catheter ablation Local activation time (LAT)

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Optimal emulations by butterfly-like networks

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JOURNAL OF THE ACM 1996年第2期43卷 293-330页

作者： Bhatt, SN Chung, FRK Hong, JW Leighton, FT Obrenic, B Rosenberg, AL Schwabe, EJ BELL COMMUN RES INC MATH INFORMAT SCI & OPERAT RES DIVMORRISTOWNNJ 07960 NYU COURANT INST MATH SCINEW YORKNY 10003 MIT COMP SCI LABCAMBRIDGEMA 02139 MIT DEPT MATHCAMBRIDGEMA 02139 CUNY QUEENS COLL DEPT COMP SCIFLUSHINGNY 11367 UNIV MASSACHUSETTS DEPT COMP SCIAMHERSTMA 01003 NORTHWESTERN UNIV DEPT ELECT ENGN & COMP SCIEVANSTONIL 60208

The power of butterfly-like networks as multicomputer interconnection networks is studied, by considering how efficiently the butterfly can emulate other networks. Emulations are studied formally via graph embeddings, so the topic here becomes: How efficiently can one embed the graph underlying a given interconnection network in the graph underlying the butterfly network? Within this framework, the slowdown incurred by an emulation is measured by the sum of the dilation and the congestion of the corresponding embedding (respectively, the maximum amount that the embedding stretches an edge of the guest graph, and the maximum traffic across any edge of the host graph);the efficiency of resource utilization in an emulation is measured by the expansion of the corresponding embedding (the ratio of the sizes of the host to guest graph). Three main results expose a number of optimal emulations by butterfly networks. Call a family of graphs balanced if complete binary trees can be embedded in the family with simultaneous dilation, congestion, and expansion O(1). (1) The family of butterfly graphs is balanced. (2) (a) Any graph G from a family of maxdegree-d graphs having a recursive separator of size S(x) can be embedded in any balanced graph family with simultaneous dilation O(log(d Sigma(i) S(2(-i)\G\))) and expansion O(1). (b) Any dilation-D embedding of a maxdegree-d graph in a butterfly graph can be converted to an embedding having simultaneous dilation O(D) and congestion O(dD). (3) Any embedding of a planar graph G in a butterfly graph must have dilation Omega(log Sigma(G)/Phi(G)), where: Sigma(G) is the size of the smallest (1/3, 2/3)-node-separator of G, and Phi(G) is the size of G's largest interior face. Applications of these results include: (1) The n-node X-tree network can be emulated by the butterfly network with slowdown O(log log n) and expansion O(1);no embedding has dilation smaller than Omega(log log n), independent of expansion. (2) Every embedding of t

关键词： embeddings emulations mapping algorithms mapping problems parallel architectures processor arrays

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