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In-memory Probabilistic computing Using Gate-Tunable Layer Pseudospins in van der Waals Heterostructures

Chinese Physics Letters 2025年第4期42卷 9-22页

作者： Jiao Xie Jun-Lin Xiong Bin Cheng Shi-Jun Liang Feng Miao Institute of Brain-Inspired Intelligence National Laboratory of Solid State MicrostructuresSchool of PhysicsCollaborative Innovation Center of Advanced MicrostructuresNanjing UniversityNanjing 210093China Institute of Interdisciplinary Physical Sciences School of ScienceNanjing University of Science and TechnologyNanjing 210094China Jiangsu Physical Science Research Center Nanjing 210093China

Layer pseudospins,exhibiting quantum coherence and precise multistate controllability,present significant potential for the advancement of future computing *** this work,we propose an in-memory probabilistic computing scheme based on the electrical manipulation of layer pseudospins in layered materials,by exploiting the interaction between real spins and layer pseudospins.

关键词： layer pseudospinsexhibiting layered materialsby real spins probabilistic computing advancement future computing technologiesin electrical manipulation layer pseudospins memory computing gate tunable layer pseudospins

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Paradigm of Magnetic Domain Wall-Based In-memory computing

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ACS APPLIED ELECTRONIC MATERIALS 2020年第8期2卷 2375-2382页

作者： Zheng, Xiangyu Wang, Junlin Li, Guanqi Lu, Xianyang Li, Wenjia Wang, Yichuan Chen, Li Yin, Haihong Wu, Jing Xu, Yongbing Univ York Dept Elect Engn Lab Spintron & Nanodevices York YO10 5DD N Yorkshire England Nanjing Univ Sch Elect Sci & Technol York Nanjing Int Ctr Spintron Nanjing 210093 Peoples R China Univ York Dept Phys York YO10 5DD N Yorkshire England Univ Leeds Sch Elect & Elect Engn Leeds LS2 9JT W Yorkshire England Nantong Univ Sch Elect & Informat Nantong 226019 Peoples R China

While conventional microelectronic integrated circuits based on electron charges approach the theoretical limitations in foreseeable future, next-generation nonvolatile logic units based on electron spins have the potential to build logic networks of low power consumption. Central to this spin-based architecture is the development of a paradigm for in-memory computing with magnetic logic units. Here, we demonstrate the basic function of a transistor logic unit with patterned Y-shaped NiFe nanowires by gate-controlled domain-wall pinning and depinning. This spin-based architecture possesses the critical functionalities of transistors and can achieve a programmable logic gate by using only one Y-shaped nanostructure, which represents a universal design currently lacking for in-memory computing.

关键词： memory computing spin-based transistor programmable nano-logic unit domain-wall logic permalloy

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A memory computing BASED METHOD FOR VECTOR SPATIAL ANALYSIS 37

A MEMORY COMPUTING BASED METHOD FOR VECTOR SPATIAL ANALYSIS

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IEEE International Geoscience and Remote Sensing Symposium (IGARSS)

作者： Qiu, Qiang Xiao, Zhuojian Fang, Jinyun Chinese Acad Sci Inst Comp Technol Beijing Peoples R China Univ Chinese Acad Sci Beijing Peoples R China

ISBN: (纸本)9781509049516

This paper presents a vector data access method in memory, aimed at improve the I/O performance bottleneck in spatial data analysis. It uses memory copy instead of data interaction between disk and memory, as the memory copy operation is much faster than disk. It designs the vector spatial data model in memory as K-V structure, and presents the data access method between memory and SIC type. The experiment result shows that, in the buffer analysis, this work can increase the I/O efficiency more than two times compared with disk I/O operation. The overall efficiency of Buffer analysis has been obviously improved.

关键词： vector data data access memory computing SIC serialization

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Spark : A Big Data Processing Platform Based On memory computing 7

Spark : A Big Data Processing Platform Based On Memory Compu...

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Seventh International Symposium on Parallel Architectures, Algorithms and Programming

作者： Han, Zhijie Zhang, Yujie Nanjing Univ Posts & Telecommun Inst Data & Knowledge Engn Nanjing Jiangsu Peoples R China Henan Univ Inst Data & Knowledge Engn Kaifeng Henan Peoples R China

ISBN: (纸本)9781467391160

Spark is a memory-based computing framework which has a better ability of computing and fault tolerance, supports batch, interactive, iterative and flow calculations. In this paper, we analyze the Spark's primary framework, core technologies, and point out the advantages and disadvantages of the Spark. In the end, we make a discussion for the future trends of the Spark technologies.

关键词： Spark memory computing Spark SQL MLlib GraphX Spark Streaming

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Low Power In-memory computing based on Dual-Mode SOT-MRAM 22

Low Power In-Memory Computing based on Dual-Mode SOT-MRAM

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22nd IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)

作者： Parveen, Farhana Angizi, Shaahin He, Zhezhi Fan, Deliang Univ Cent Florida Dept Elect & Comp Engn Orlando FL 32816 USA

ISBN: (纸本)9781509060238

In this paper, we propose a novel Spin Orbit Torque Magnetic Random Access memory (SOT-MRAM) array design that could simultaneously work as non-volatile memory and implement a reconfigurable in-memory logic (AND, OR) without add-on logic circuits to memory chip as in traditional logic-in-memory designs. The computed logic output could be simply read out like a normal MRAM bit-cell using the shared memory peripheral circuits. Such intrinsic in-memory logic could be used to process data within memory to greatly reduce powerhungry and long distance data communication in conventional Von-Neumann computing systems. We further employ inmemory data encryption using Advanced Encryption Standard (AES) algorithm as a case study to demonstrate the efficiency of the proposed design. The device to architecture co-simulation results show that the proposed design can achieve 70.15% and 80.87% lower energy consumption compared to CMOS-ASIC and CMOL-AES implementations, respectively. It offers almost similar energy consumption as recent DW-AES implementation, but with 60.65% less area overhead.

关键词： memory computing memory architecture SOTMRAM giant spin hall effect magnetic tunnel junction

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Giant Ferroelectric Resistance Switching Controlled by a Modulatory Terminal for Low-Power Neuromorphic In-memory computing

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ADVANCED MATERIALS 2021年第21期33卷 2008709-2008709页

作者： Xue, Fei He, Xin Wang, Zhenyu Retamal, Jose Ramon Duran Chai, Zheng Jing, Lingling Zhang, Chenhui Fang, Hui Chai, Yang Jiang, Tao Zhang, Weidong Alshareef, Husam N. Ji, Zhigang Li, Lain-Jong He, Jr-Hau Zhang, Xixiang King Abdullah Univ Sci & Technol Phys Sci & Engn Div Thuwal 239556900 Saudi Arabia Shanghai Jiao Tong Univ Natl Key Lab Sci & Technol Micro Nano Fabricat Shanghai 200240 Peoples R China King Abdullah Univ Sci & Technol Comp Elect & Math Sci & Engn Div Thuwal 239556900 Saudi Arabia Liverpool John Moores Univ Dept Elect & Elect Engn Liverpool L3 3AF Merseyside England Loughborough Univ Comp Sci Dept Loughborough LE11 3TU Leics England Hong Kong Polytech Univ Dept Appl Phys Kowloon Hong Kong Peoples R China Chinese Acad Sci Beijing Inst Nanoenergy & Nanosyst Beijing Key Lab Micronano Energy & Sensor CAS Ctr Excellence Nanosci Beijing 100083 Peoples R China Univ New South Wales Dept Mat Sci & Engn Kensington NSW 2052 Australia

Ferroelectrics have been demonstrated as excellent building blocks for high-performance nonvolatile memories, including memristors, which play critical roles in the hardware implementation of artificial synapses and in-memory computing. Here, it is reported that the emerging van der Waals ferroelectric alpha-In2Se3 can be used to successfully implement heterosynaptic plasticity (a fundamental but rarely emulated synaptic form) and achieve a resistance-switching ratio of heterosynaptic memristors above 10(3), which is two orders of magnitude larger than that in other similar devices. The polarization change of ferroelectric alpha-In2Se3 channel is responsible for the resistance switching at various paired terminals. The third terminal of alpha-In2Se3 memristors exhibits nonvolatile control over channel current at a picoampere level, endowing the devices with picojoule read-energy consumption to emulate the associative heterosynaptic learning. The simulation proves that both supervised and unsupervised learning manners can be implemented in alpha-In2Se3 neutral networks with high image recognition accuracy. Moreover, these heterosynaptic devices can naturally realize Boolean logic without an additional circuit component. The results suggest that van der Waals ferroelectrics hold great potential for applications in complex, energy-efficient, brain-inspired computing systems and logic-in-memory computers.

关键词： heterosynaptic plasticity in‐ memory computing neuromorphic computing van der Waals ferroelectric

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All electrical switching of 2D multiferroic heterostructure

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Science China Materials 2025年第4期68卷 1303-1304页

作者： Kian Ping Loh Department of Chemistry National University of SingaporeSingapore 117546Singapore

The emergence of generative artificial intelligence (AI) has catalyzed a new wave of intelligence development, resulting in significant growth in computing capabilities and intensifying competition for advanced computational power. In-memory computing based on magnetic random-access memory (MRAM)offers advantages such as high speed and low power consumption is primed for enabling high-performance AI computing[1-6].

关键词： advanced computational power electrical switching memory computing intelligence development d multiferroic heterostructure high speed generative artificial intelligence magnetic random access memory

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Optimized Parallelization of Binary Classification Algorithms Based on Spark 9

Optimized Parallelization of Binary Classification Algorithm...

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9th International Symposium on Computational Intelligence and Design (ISCID)

作者： Geng, Yushui Zhang, Jianguo Qilu Univ Technol Sch Informat Jinan Peoples R China

ISBN: (纸本)9781509035588

In recent years, parallel computing and machine learning have gradually became a research hotspot in big data field. Now users who are familiar with the R language can easily complete the data analysis on the platform of Apache Spark with the programming interface called SparkR provided by Apache Spark. There are several realized classification algorithms (including multiple classification and binary classification) in SparkR, in order to speed up the training process in binary-class classification, this paper proposes a theory of adopting an iterative calculation model for the local optimization on the basis of conventional parallelization. The experimental result shows that the design of parallelization of binary classification algorithm based on spark is much better and faster comparing with the MapReduce on Hadoop.

关键词： parallel algorithm memory computing Spark classification MapReduce

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The research of distributed shared memory technology in power system 2

The research of distributed shared memory technology in powe...

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2017 IEEE 2nd Information Technology, Networking, Electronic and Automation Control Conference (ITNEC 2017)

作者： Pan Xu Weijin Zhuang Xinghua Li Jin Liu Mingyang Sun Longda Huang Hong Zhang Jiajia Pan Xu Zhang China Electric Power Research Institute State Grid Ningxia Electric Power Research Institute

ISBN: (纸本)9781509064151;9781509064144

Data processing in power system is becoming to a performance limitation with the rapid development of power grid. This paper proposes a method to improve the data processing efficiency in power system by distributed memory sharing technology. By this method, the data is partitioned into fragments according to the value which is generated through a specific hash algorithm with the input of the key of the record, and the record will be stored into different machine's memory according to the hash value, by experiments compared to the original solution, distributed shared memory technology has obvious advantages on the performance of data processing.

关键词： power systems distributed shared memory data-processing memory computing

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The Performance Survey of In memory Database 21

The Performance Survey of In Memory Database

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21st IEEE International Conference on Parallel and Distributed Systems ICPADS

作者： Wang, Yinfeng Zhong, Guiquan Kun, Lin Wang, Longxiang Kai, Huang Guo, Fuliang Liu, Chengzhe Dong, Xiaoshe ShenZhen Inst Informat Technol Shenzhen Guangdong Peoples R China ShenZhen Kingdom Ltd Share Ltd Shenzhen Guangdong Peoples R China Xi An Jiao Tong Univ Dept Comp Sci Xian Shaanxi Peoples R China

ISBN: (纸本)9780769557854

To satisfy the ever-increasing performance demand of Big Data and critical applications the data management needs to offer the flexible schema, high availability, light weight replica, high volume and high scalability features so as to facilitate the transaction. The in memory database (IMDB) eliminates the I/O bottleneck by storing data in main memory. We give a deeper analysis of current main-stream IMDB systems performance which focuses on the data structure, architecture, volume, concurrency, availability and scalability. The V3 performance model is proposed to evaluate the Velocity, Volume and Varity of the 19 IMDB systems, in order to highlight the candidates with real-time transaction and high volume processing capacity coordinately. Test results clearly demonstrate that NewSQL is better at dealing with high-frequency trading models. To fully utilize the advantages of the multi-core and many-core processors capability improvements, a three-level optimization design strategy, which includes the memory-access level, the kernel-speedup level and the data-partition level also be proposed using the hardware parallelism for achieving task-level and data-level parallelism of IMDB programs, guarantees the IMDB could accelerate the real-time transaction in an efficient way. We believe that IMDB should become a compulsive option for enterprise users.

关键词： In memory Database Trading System Performance Evaluation memory computing Big Data

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