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iCETD: An improved tag generation design for memory data authentication in embedded processor systems

INTEGRATION-THE VLSI JOURNAL 2017年第Jan.期56卷 96-104页

作者： Liu, Tao Guo, Hui Parameswaran, Sri Hu, Sharon X. Univ New South Wales Sch Comp Sci & Engn Sydney NSW 2052 Australia Univ Notre Dame Notre Dame IN 46556 USA

Security becomes increasingly important in computing systems. data integrity is of utmost importance. One way to protect data integrity is attaching an identifying tag to individual data. The authenticity of the data can then be checked against its tag. If the data is altered by the adversary, the related tag becomes invalid and the attack will be detected. The work presented in this paper studies an existing tag design (CETD) for authenticating memory data in embedded processor systems, where data that are stored in the memory or transferred over the bus can be tampered. Compared to other designs, this design offers the flexibility of trading-off between the implementation cost and tag size (hence the level of security);the design is cost effective and can counter the data integrity attack with random values (namely the fake values used to replace the valid data in the attack are random). However, we find that the design is vulnerable when the fake data is not randomly selected. For some data, their tags are not distributed over the full tag value space but rather limited to a much reduced set of values. When those values were chosen as the fake value, the data alteration would likely go undetected. In this article, we analytically investigate this problem and propose a low cost enhancement to ensure the full-range distribution of tag values for each data, hence effectively removing the vulnerability of the original design.

关键词： Tag design memory data authentication Low cost embedded systems

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A Cost-Effective Tag Design for memory data authentication in Embedded Systems

A Cost-Effective Tag Design for Memory Data Authentication i...

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ACM International Conference on Compilers, Architectures and Synthesis for Embedded Systems (CASES)

作者： Hong, Mei Guo, Hui Hu, X. Sharon Univ New S Wales Sch Comp Sci & Engn Sydney NSW 2052 Australia

ISBN: (纸本)9781450314244

This paper presents a tag design approach for memory data integrity protection. The approach is area, power and memory efficient, suitable to embedded systems that often suffer from stringent resource restriction. Experiments have been performed to compare the proposed approach with the state-of-the-art designs, which demonstrate that the approach can produce a memory data protection design with a low resource cost - achieving overhead savings of about 39% on chip area, 45% on power consumption, 65% on performance, and 12% on memory cost while maintaining the same or higher security level.

关键词： tag design memory data authentication low on-chip cost embedded systems

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