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microcode processing: Positioning and directions

IEEE MICRO 2003年第4期23卷 21-30页

作者： Vassiliadis, S Wong, S Cotofana, S Delft Univ Technol Comp Engn Lab Dept Elect Engn Delft Netherlands

microcode IS AN IMPORTANT INNOVATION IN COMPUTER ENGINEERING. THE AUTHORS DISCUSS THE EVOLUTION OF microcode FROM ITS INTRODUCTION TO ITS DECLINE AND TO ITS LIKELY RESURGENCE IN CUSTOM COMPUTING MACHINES. FURTHERMORE, THEY PRESENT A microcodeD MACHINE AUGMENTED WITH FIELD-PROGRAMMABLE GATE ARRAYS (FPGAS) AND PROVIDE EXPERIMENTAL EVIDENCE THAT IT CAN SUBSTANTIALLY INCREASE THE PERFORMANCE OF SOME MEDIA BENCHMARKS.

关键词： Computers resurgence Writers Field programmable gate arrays microcode COMPUTER ENGINEERING

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z/CECSIM:: An efficient and comprehensive microcode simulator for the IBM eServer z900

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IBM JOURNAL OF RESEARCH AND DEVELOPMENT 2002年第4-5期46卷 607-615页

作者： von Buttlar, J Böhm, H Ernst, R Horsch, A Kohler, A Schein, H Stetter, M Theurich, K IBM Deutschland Entwicklung GMBH D-71032 Boblingen Germany

An IBM eServer zSeries(TM) system uses various types of microcode (firmware) that implement functions such as the execution of complex instructions in the CPUs, I/O operations performed by the system assist processors (SAPs), the management of logical partitions (LPARs), and control by the support element (SE). Each microcode component must be verified by itself and in conjunction with the others. Tight development schedules and a very limited supply of expensive engineering hardware make it desirable to perform this verification in a simulation environment. For the development of the z900, a new microcode simulator, the z/CECSIM (Central Electronic Complex Simulator), was successfully implemented. Several microcode components are connected in a single simulation environment, thereby allowing an unprecedented amount of development, integration, and testing without the use of engineering hardware. z/CECSIM creates a virtual zSeries CEC on VM/ESA(R)or z/VM(TM) that allows the simulation of zSeries microcode. It executes the instruction stream as completely as possible on the underlying hardware. Only instructions that are newly introduced with the system being developed or that perform a microcode-internal function are simulated. Additional software models mimic the behavior of I/O and coupling channels. An optional SE connection allows verification of interactions between the CEC and its support element.

关键词： .interrupt underlying hardware simulation environment microcode IBM Deutschland Entwicklung GmbH support element millicode engineering hardware CECSIM SE connection

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Evolution of processor microcode

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IEEE TRANSACTIONS ON EVOLUTIONARY COMPUTATION 2005年第1期9卷 44-54页

作者： Jackson, D Univ Liverpool Dept Comp Sci Liverpool L69 3BX Merseyside England

The control unit of many modern computer processors is implemented using microcode. Because of its low level and high complexity, writing microcode that is not only correct but efficient is extremely challenging. An interesting question is whether evolutionary computing techniques could be used to generate microprograms that are of the necessary quality. To answer this, a genetic programming system has been built that evolves microprograms for an architecture that incorporates many of the features common to real microprogrammed systems. Fitness is assessed via simulated execution to determine whether candidate solutions effect the correct machine state changes. The system has been used to evolve microprograms that emulate a range of machine code instructions, of varying complexity. It has been found that, provided appropriate evolutionary guidance is extracted from operational specifications of those instructions, the approach is largely successful in generating solutions that are both correct and optimal.

关键词： evolution genetic programming (GP) microcode microprogramming

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A microcode COMPILER FOR THE WATCH-ORIENTED RISC PROCESSOR

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SOFTWARE-PRACTICE & EXPERIENCE 1990年第7期20卷 729-747页

作者： ISELI, C Ecole Polytechnique Federale de Lausanne Laboratoire de systemes logiques EL-E Ecublens CH-1015 Lausanne Switzerland

The WORP project embodies the design of a real-time oriented RISC microprocessor and a complete application development environment for this processor. The three most original aspects of this project are: (a) the microprocessor has no assembly language, but is programmed in microcode; the compiler will translate the high-level language directly into microcode; (b) there is a certain amount of parallelism available at the microcode level; the compiler will take advantage of this parallelism without putting extra burden on the programmer; (c) the compiler performs instruction rescheduling in order to take further advantage of the parallelism available at the microcode level. This paper describes the high-level language and compiler aspects of the WORP project, and concentrates on the instruction rescheduling and other optimizations performed by the compiler. A modest comparative bench-mark is provided.

关键词： Code generation Instruction rescheduling Compiler microcode

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AUTOMATIC COMPACTION OF microcode

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MICROPROCESSORS AND MICROSYSTEMS 1990年第1期14卷 21-29页

作者： LIOY, A MEZZALAMA, M Dipartimento di Automatica e Informatica Politecnico di Torino corso Duca degli Abruzzi 24 I-10129 Torino Italy

A microcode compaction algorithm based on a new description of microoperations and microinstructions is proposed. The technique is independent of the target machine since it does not refer to any machine timing description. It is assumed that the microprogram is described via a high-level microprogramming language. The compaction algorithm is described in terms of operations on the sets of source and destination resources for each microcode block. Some evaluations are made concerning the efficiency of the automatically generated microcode with respect to an increasing microprogram complexity.

关键词： compaction algorithm microcode microprogramming

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microcode: live, portable programming for children via robotics 37

MicroCode: live, portable programming for children via robot...

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37th ACM Annual Symposium on User Interface Software and Technology (UIST)

作者： Underwood, Lorraine Ball, Thomas Hodges, Steve Rubegni, Elisa de Halleux, Peli Finney, Joe Univ Lancaster Lancaster England Microsoft Redmond WA USA

ISBN: (纸本)9798400707186

The BBC micro:bit is a popular tool in education for teaching coding, but typically requires a host computer and internet access, limiting its accessibility. microcode addresses this by enabling portable programming directly on the micro:bit using a battery-powered accessory with an OLED screen and navigation buttons. This system utilises a simple, handheld graphical tile-based programming paradigm, yet supports complex programs with features including conditional execution and variables, providing immediate feedback through live programming. This paper illustrates how early studies have received a positive reception from children and educators, especially when paired with robotics as an application domain. Plans for future work aim to extend the reach of microcode by providing more tangible digital learning opportunities to pre-literate children and communities around the world where access to mains power and internet are scarce.

关键词： micro:bit microcode programming live portable robotics

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VERIFIED microcode DESIGN

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MICROPROCESSORS AND MICROSYSTEMS 1990年第10期14卷 623-630页

作者： SHEPHERD, D Inmos Ltd 1000 Aztec West Almondsbury Bristol BS12 4SQ UK

The avoidance of errors in any engineering profession is highly desirable. The increasing complexity of hardware devices makes the task of producing a correct implementation increasingly difficult using traditional design techniques. Mathematical techniques now appear to offer the opportunity to produce correct designs using a method that can eliminate the introduction of errors. This approach is not only desirable from an 'academic' viewpoint but may also become an economic necessity. This paper describes how mathematical transformations on the source code of a programming language were used to aid the development of microcode for the IMS T800 transputer floating-point microprocessor. The process for developing the microcode is demonstrated through a simple example of a single instruction.

关键词： VLSI DESIGN MICROPROCESSORS microcode FORMAL METHODS OCCAM TRANSPUTERS

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Context-Sensitive Fencing: Securing Speculative Execution via microcode Customization 19

Context-Sensitive Fencing: Securing Speculative Execution vi...

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24th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)

作者： Taram, Mohammadkazem Venkat, Ashish Tullsen, Dean Univ Calif San Diego La Jolla CA 92093 USA Univ Virginia Charlottesville VA 22903 USA

ISBN: (纸本)9781450362405

This paper describes context-sensitive fencing (CSF), a microcode-level defense against multiple variants of Spectre. CSF leverages the ability to dynamically alter the decoding of the instruction stream, to seamlessly inject new micro-ops, including fences, only when dynamic conditions indicate they are needed. This enables the processor to protect against the attack, but with minimal impact on the efficacy of key performance features such as speculative execution. This research also examines several alternative fence implementations, and introduces three new types of fences which allow most dynamic reorderings of loads and stores, but in a way that prevents speculative accesses from changing visible cache state. These optimizations reduce the performance overhead of the defense mechanism, compared to state-of-the-art software-based fencing mechanisms by a factor of six.

关键词： secure architectures side-channel attacks Spectre speculative execution microcode taint tracking

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MicroTiger: A Graphical microcode Simulator with a Reconfigurable Datapath 07

MicroTiger: A Graphical Microcode Simulator with a Reconfigu...

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38th SIGCSE Technical Symposium on Computer Science Education

作者： VanBuren, Brian G. Shaaban, Muhammad Rochester Inst Technol Rochester NY 14623 USA

ISBN: (纸本)9781595933614

This paper describes the MicroTiger software that combines a graphical microcode simulator with a reconfigurable data-path. The resulting implemented simulator is able to fill the void in microprogramming tools since there are no graphical microcode simulators that allow such customization of the datapath. The customization of the datapath goes beyond allowing different Files specifying the datapath, it allows the datapath to be created and modified using the graphical interface like a circuit editor. In the academic setting, MicroTiger provides easier microcode testing on the instruction level for instructors and provides simulation debugging through code tracing and breakpoints for students.

关键词： Architecture microcode simulator visualization

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An Exploratory Analysis of microcode as a Building Block for System Defenses 18

An Exploratory Analysis of Microcode as a Building Block for...

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ACM SIGSAC Conference on Computer and Communications Security (CCS)

作者： Kollenda, Benjamin Koppe, Philipp Fyrbiak, Marc Kison, Christian Paar, Christof Holz, Thorsten Ruhr Univ Bochum Bochum Germany

ISBN: (纸本)9781450356930

microcode is an abstraction layer used by modern x86 processors that interprets user-visible CISC instructions to hardware-internal RISC instructions. The capability to update x86 microcode enables a vendor to modify CPU behavior in-field, and thus patch erroneous microarchitectural processes or even implement new features. Most prominently, the recent Spectre and Meltdown vulnerabilities were mitigated by Intel via microcode updates. Unfortunately, microcode is proprietary and closed source, and there is little publicly available information on its inner workings. In this paper, we present new reverse engineering results that extend and complement the public knowledge of proprietary microcode. Based on these novel insights, we show how modern system defenses and tools can be realized in microcode on a commercial, off-the-shelf AMD x86 CPU. We demonstrate how well-established system security defenses such as timing attack mitigations, hardware-assisted address sanitization, and instruction set randomization can be realized in microcode. We also present a proof-of-concept implementation of a microcode-assisted instrumentation framework. Finally, we show how a secure microcode update mechanism and enclave functionality can be implemented in microcode to realize a small trusted execution environment. All microcode programs and the whole infrastructure needed to reproduce and extend our results are publicly available.

关键词： security microcode defense

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