检索结果-内蒙古大学图书馆

Towards the Formal Verification of a Java Processor in Event-B

ELECTRONIC NOTES IN THEORETICAL COMPUTER SCIENCE 2008年第C期201卷 45-67页

作者： Evans, Neil Grant, Neil AWE Aldermaston England

Formal verification is becoming more and more important in the production of high integrity microprocessors. The general purpose formal method called Event-B is the latest incarnation of the B Method: it is a proof-based approach with a formal notation and refinement technique for modelling and verifying systems. Refinement enables implementation-level features to be proven correct with respect to an abstract specification of the system. In this paper we demonstrate an initial attempt to model and verify Sandia National Laboratories' Score processor using Event-B. The processor is an (almost complete) implementation of a Java Virtual Machine in hardware. Thus, refinement-based verification of the Score processor begins with a formal specification of Java bytecode. Traditionally, B has been directed at the formal development of software systems. The use of B in hardware verification could provide a means of developing combined software/hardware systems, i.e. codesign.

关键词： Java processor microcoded architecture Event-B refinement

来源：评论

学校读者我要写书评

暂无评论

A Complete Design-Flow for the Generation of Ultra Low-Power WSN Node architectures Based on Micro-Tasking 10

A Complete Design-Flow for the Generation of Ultra Low-Power...

引用

47th Design Automation Conference (DAC)

作者： Pasha, Muhammad Adeel Derrien, Steven Sentieys, Olivier Univ Rennes 1 IRISA INRIA Campus Beaulieu Rennes France

ISBN: (纸本)9781450300025

Wireless Sensor Networks (WSN) are a new and very challenging research field for embedded system design automation, as their design must enforce stringent constraints in terms of power and cost. WSN node devices have until now been designed using off-the-shelf low-power microcontroller units (MCUs), even if their power dissipation is still an issue and hinders the wide-spreading of this new technology. In this paper, we propose a new architectural model for WSN nodes (and its complete design-flow from C downto synthesizable VHDL) based on the notion of micro-tasks. Our approach combines hardware specialization and power-gating so as to provide an ultra low-power solution for WSN node design. Our first estimates show that power savings by one to two orders of magnitude are possible w.r.t. MCU-based implementations.

关键词： Hardware Specialization Low-Power Design microcoded architecture WSN Node

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：