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PERFORMANCE EVALUATION OF microprocessor array

IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES 1983年第3期130卷 65-74页

作者： LI, HF LAU, CC Department of Electrical Engineering University of Hong Kong Hong Kong Hong Kong

In the design of uniformly structured and tightly coupled multiple microprocessor/microcomputer systems, if each node is allowed to access certain portions of the memory in each of its neighbour nodes, bus contention may occur and an intelligent priority resolver must be incorporated to solve the contention problem effectively. A successful access is indicated by a successful handshake between the nodes concerned. The paper endeavours to evaluate the effects of these memory accesses under given request patterns, as well as under a stochastic model, assuming that all nodes are alike.

关键词： multiprocessing systems microcomputers Other computer theory Microcomputer techniques microprocessor array handshake stochastic model bus contention Microcomputers intelligent priority resolver

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The Indirect Binary n-Cube microprocessor array

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IEEE Transactions on Computers 1977年第5期C-26卷 458-473页

作者： Pease, Marshall C. Information Science Laboratory Information Science and Engineering Division Stanford Research Institute Menlo Park CA 94025 United States

This paper explores the possibility of using a large-scale array of microprocessors as a computational facility for the execution of massive numerical computations with a high degree of parallelism. By microprocessor we mean a processor realized on one or a few semiconductor chips that include arithmetic and logical facilities and some memory. The current state of LSI technology makes this approach a feasible and attractive candidate for use in a macrocomputer facility. The array studied is called the indirect binary n-cube array. It uses a network of switching nodes to obtain a high degree of flexibility of the connections among the microprocessors without placing excessive demands on the scarce resource of the pins on a microprocessor. A number of computational procedures are discussed. Detailed attention is given to the communication requirements for algorithms used in the solution of partial differential equations in two or three dimensions. The use of the array for the radix-2 fast Fourier transform (FFT) and related signal processing applications is considered. Its use for matrix operations is also discussed, with particular attention given to matrix multiplication as the most basic operation. The final conclusion is that the indirect binary n-cube array is useful for a very wide range of important problems, and thus is an attractive candidate for the design of a large-scale array of microprocessors. Copyright © 1977 by The Institute of Electrical and Electronics Engineers, Inc.

关键词： Admissible maps array processor fast Fourier transform grid computations microprocessor array n-cube array parallel matrix multiplication parallel processing permutation network switching network triangular permutations virtual array

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On a Varistructured array of microprocessors

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IEEE Transactions on Computers 1977年第2期C-26卷 125-138页

作者： Lipovski, G. Jack University of Texas Austin TX 78712 United States

The varistructure architecture gives the user the opportunity to specify the height and width of his primary memory “at run time.” This architecture, first proposed in 1973, has now been simplified to make it schedulable, extended to allow SIMD vector-vector operations, and further extended to provide variable structure within a task. Memory is efficiently utilized in that memory bandwidth can be increased for array processing, yet memory space is not wasted during string processing. The fetch-execute cycle operation is analyzed herein, and some tentative results regarding input-output and data communication between processing entities are reported. On the basis of the simplicity of the fetch-execute cycle, there is hope that this architecture may well be the best way to build minicomputers and large computers using a cellular array of microprocessors. Copyright © 1977 by The Institute of Electrical and Electronics Engineers, Inc.

关键词： Computer architecture microprocessor array reconfigurable computer SIMD computer supercomputer varistructure

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