In this work the hardware-friendly Enhanced Spread and Iterative Search (ES&IS) motionestimation (ME) algorithm is presented and evaluated for the High Efficiency Video Coding Standard (HEVC). The ES&IS is di...
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ISBN:
(纸本)9781479924523
In this work the hardware-friendly Enhanced Spread and Iterative Search (ES&IS) motionestimation (ME) algorithm is presented and evaluated for the High Efficiency Video Coding Standard (HEVC). The ES&IS is divided in two steps: a central evaluation and a spread evaluation with a refinement. The ES&IS was compared with Enhanced Predictive Zonal Search (EPZS) using the HEVC reference software. Software evaluations showed that, in average, the ES&IS presents a 1.07% increase in bitrate and 0.05% decrease in PSNR when compared to EPZS. However, the main advantage of the ES&IS is its hardware-friendly aspect.
In this paper the hardware friendly Multi Point Diamond Search (MPDS) motionestimation (ME) algorithm is evaluated in the High Efficiency Video Coding Standard (HEVC). The MPDS algorithm was implemented in HEVC refer...
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ISBN:
(纸本)9781479923410
In this paper the hardware friendly Multi Point Diamond Search (MPDS) motionestimation (ME) algorithm is evaluated in the High Efficiency Video Coding Standard (HEVC). The MPDS algorithm was implemented in HEVC reference software and its efficiency is compared with the standard HEVC fast algorithm, the Enhanced Predictive Zonal Search (EPZS). The evaluation result, in average, shows loses of only 1.7% in the compression rate and 0.05% in PSNR. However, the main advantage of the MPDS algorithm is its hardware friendly aspect and this paper also presents its hardware design focused on real time processing HD 1080p videos. The designed architecture is capable to process HD 1080p videos in real time when synthesized for TSCM 90nm technology. The MPDS algorithm has obtained a good tradeoff among quality, compression rate and costs for its hardware implementation.
In this paper the hardware friendly Multi Point Diamond Search (MPDS) motionestimation (ME) algorithm is evaluated in the High Efficiency Video Coding Standard (HEVC). The MPDS algorithm was implemented in HEVC refer...
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ISBN:
(纸本)9781479923427
In this paper the hardware friendly Multi Point Diamond Search (MPDS) motionestimation (ME) algorithm is evaluated in the High Efficiency Video Coding Standard (HEVC). The MPDS algorithm was implemented in HEVC reference software and its efficiency is compared with the standard HEVC fast algorithm, the Enhanced Predictive Zonal Search (EPZS). The evaluation result, in average, shows loses of only 1.7% in the compression rate and 0.05% in PSNR. However, the main advantage of the MPDS algorithm is its hardware friendly aspect and this paper also presents its hardware design focused on real time processing HD 1080p videos. The designed architecture is capable to process HD 1080p videos in real time when synthesized for TSCM 90nm technology. The MPDS algorithm has obtained a good tradeoff among quality, compression rate and costs for its hardware implementation.
High resolution and high refresh rate increase the pressure of wide transmission. Usually, video compression is used to solve this problem. However, traditional video compression methods cannot be performed in bit-pla...
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High resolution and high refresh rate increase the pressure of wide transmission. Usually, video compression is used to solve this problem. However, traditional video compression methods cannot be performed in bit-plane, which will increase the cost of storage area. For this reason, this paper first introduces a bit just noticeable difference (BJND) model based on bit-plane. By analyzing the relationship between the bit-plane, frequency and eccentricity, the bit just noticeable difference threshold of viewpoint is calculated. Finally, the just noticeable difference model applied to bit-plane is obtained. Then this paper proposes a video compression scheme based on bit motion estimation algorithm, which optimizes the search range of motionestimation into two small rhombuses of time dimension and gray-scale dimension. According to human visual system and probability statistical analysis, supplementary matching blocks are added to replace residual data, so that the compression ratio will be constant. The experimental results show that the proposed scheme has the best comprehensive effect on the compression of the lower five-bit plane. The compression ratio is 1.385, the data transmission is constant, and there is no obvious difference between the restored image and the original image, which conforms to the intuitive perception of the human eye.
In this paper, a computation-efficient implementation of the flexible triangle (FTS) search algorithm is presented. The FTS is a fast block-matching algorithm for motionestimation proposed in previous work. The FTS i...
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ISBN:
(纸本)9781424453771
In this paper, a computation-efficient implementation of the flexible triangle (FTS) search algorithm is presented. The FTS is a fast block-matching algorithm for motionestimation proposed in previous work. The FTS is used for block-based motionestimation where it can locate the best matching blocks between two frames using a search triangle of flexible size and orientation. This flexibility provide the triangle with the high efficiency to locate the best matching block in fewer number of search iterations. Further analyses of the FTS performance indicates that more computation efficiency can be achieved in loading the search area and the computing the matching criterion between two macroblocks. Adjacent search areas are overlapped and consequently, the loading mechanism can be modified to load only the non-overlapped sections In addition, loading of search area and other data can start earlier parallel with the algorithm initialization. Finally, the computed SAD results can be stored and then later used instead of re-computing them again. The proposed implementation in this paper reduces the average number of cycles required to finish one macroblock search by around 26% and thus enable the video encoder to support higher frequencies or larger resolutions. The proposed technique was implemented in FPGA as part of the flexible triangle search (FTS) motion estimation algorithm.. The proposed design was implemented, simulated, and tested using VHDL and synthesized using Xilinx ISE for the Xilinx Spartan3 device. The results obtained were compared to an FPGA implementation of the FTS algorithm published in previous work.
An improved method for the TZSearch fast motion estimation algorithm in the Joint Multi-view Video Coding (JMVC) is proposed in this work. It is based on early terminating the calculation of Sum of Absolute Difference...
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ISBN:
(纸本)9781479927630
An improved method for the TZSearch fast motion estimation algorithm in the Joint Multi-view Video Coding (JMVC) is proposed in this work. It is based on early terminating the calculation of Sum of Absolute Difference (SAD) and increasing the number of predicted motion vectors to reduce the inter-view redundancy and save the encoding time. Experimental results show that the proposed method has much more reduction in encoding time than the original TZSearch method in the JMVC, under the conditions of the encoding bit-rate and Peak Signal to Noise Ratio (PSNR) barely changed.
An improved method for the TZSearch fast motion estimation algorithm in the Joint Multi-view Video Coding (JMVC) is proposed in this work. It is based on early terminating the calculation of Sum of Absolute Difference...
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ISBN:
(纸本)9781479927654
An improved method for the TZSearch fast motion estimation algorithm in the Joint Multi-view Video Coding (JMVC) is proposed in this work. It is based on early terminating the calculation of Sum of Absolute Difference (SAD) and increasing the number of predicted motion vectors to reduce the inter-view redundancy and save the encoding time. Experimental results show that the proposed method has much more reduction in encoding time than the original TZSearch method in the JMVC, under the conditions of the encoding bit-rate and Peak Signal to Noise Ratio (PSNR) barely changed.
This paper presents an algorithmic enhancement of the full-search block-matching algorithm for motionestimation for real-time systems. The multi-stage interval based motionestimation (MIME) algorithm reduces the com...
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ISBN:
(纸本)0780385047
This paper presents an algorithmic enhancement of the full-search block-matching algorithm for motionestimation for real-time systems. The multi-stage interval based motionestimation (MIME) algorithm reduces the computational load by successively eliminating candidate blocks from the search window. The elimination process uses low bit-resolution and it is applied in multiple stages for motion vector computation. On an average, MIME eliminates more than 88% of the candidate blocks in the search window after first and second stage. Based on these results, in real-time environment, the algorithm can be stopped at any stage without incurring significant loss in motionestimation accuracy. Simulation results show that, in worst case scenario when the algorithm stops after first stage, there is an average loss of only 3dB in PSNR as compared to full-search block-matching algorithm and an average loss of 1.2dB if the algorithm is stopped after the second step.
motionestimation is the most computationally expensive task in MPEG-style video compression. Video compression is starting to be widely used in battery-powered terminals, but surprisingly little is known about the po...
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motionestimation is the most computationally expensive task in MPEG-style video compression. Video compression is starting to be widely used in battery-powered terminals, but surprisingly little is known about the power consumption of modern motion estimation algorithms. This paper describes our effort to analyze the power and performance of realistic motion estimation algorithms in both hardware and software realizations. For custom hardware realizations, this paper presents a general model of VLSI motionestimation architectures. This model allows us to analyze in detail the power consumption of a large class of modern motionestimation engines that can execute the motion estimation algorithms of interest to us. We compare these algorithms in terms of their power consumption and performance. For software realizations, this paper provides the first detailed instruction-level simulation results on motionestimation based on a programmable CPU core. We analyzed various aspects of the selected motion estimation algorithms, such as search speed and power distribution. This paper provides a guideline to two types of machine designs for motionestimation: custom ASIC ( Application Specific Integrated Circuit) design and custom ASIP ( Application Specific Instruction-set Processor) designs.
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