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20th Annual International Conference on Computational Science (ICCS)

作者： Morgenstern, Laura Haensel, David Beckmann, Andreas Kabadshow, Ivo Forschungszentrum Julich Julich Supercomp Ctr D-52425 Julich Germany Tech Univ Chemnitz Fac Comp Sci D-09111 Chemnitz Germany

ISBN: (纸本)9783030504366;9783030504359

Following the trend towards Exascale, today's supercomputers consist of increasingly complex and heterogeneous compute nodes. To exploit the performance of these systems, research software in HPC needs to keep up with the rapid development of hardware architectures. Since manual tuning of software to each and every architecture is neither sustainable nor viable, we aim to tackle this challenge through appropriate software design. In this article, we aim to improve the performance and sustainability of FMSolvr, a parallel Fast Multipole Method for Molecular Dynamics, by adapting it to Non-Uniform Memory Access architectures in a portable and maintainable way. The parallelization of FMSolvr is based on Eventify, an event-based tasking framework we co-developed with FMSolvr. We describe a layered software architecture that enables the separation of the Fast Multipole Method from its parallelization. The focus of this article is on the development and analysis of a reusable NUMA module that improves performance while keeping both layers separated to preserve maintainability and extensibility. By means of the NUMA module we introduce diverse NUMA-aware data distribution, thread pinning and work stealing policies for FMSolvr. During the performance analysis the modular design of the NUMA module was advantageous since it facilitates combination, interchange and redesign of the developed policies. The performance analysis reveals that the runtime of FMSolvr is reduced by 21% from 1.48 ms to 1.16 ms through these policies.

关键词： Non-uniform memory access multicore programming Software architecture Fast multipole method

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Disentanglement in Nested-parallel programs

Disentanglement in Nested-parallel programs

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Proceedings of the ACM on programming Languages

作者： Westrick, Sam Yadav, Rohan Fluet, Matthew Acar, Umut A. Carnegie Mellon University PittsburghPA United States Rochester Institute of Technology RochesterNY United States

Nested parallelism has proved to be a popular approach for programming the rapidly expanding range of multicore computers. It allows programmers to express parallelism at a high level and relies on a run-time system and a scheduler to deliver efficiency and scalability. As a result, many programming languages and extensions that support nested parallelism have been developed, including in C/C++, Java, Haskell, and ML. Yet, writing efficient and scalable nested parallel programs remains challenging, primarily due to difficult concurrency bugs arising from destructive updates or effects. For decades, researchers have argued that functional programming can simplify writing parallel programs by allowing more control over effects but functional programs continue to underperform in comparison to parallel programs written in lower-level languages. The fundamental difficulty with functional languages is that they have high demand for memory, and this demand only grows with parallelism. In this paper, we identify a memory property, called disentanglement, of nested-parallel programs, and propose memory management techniques for improved efficiency and scalability. Disentanglement allows for (destructive) effects as long as concurrently executing threads do not gain knowledge of the memory objects allocated by each *** formally define disentanglement by considering an ML-like higher-order language with mutable references and presenting a dynamic semantics for it that enables reasoning about computation graphs of nested parallel programs. Based on this graph semantics, we formalize a classic correctness property - determinacy race freedom - and prove that it implies disentanglement. This establishes that disentanglement applies to a relatively broad class of parallel programs. We then propose memory management techniques for nested-parallel programs that take advantage of disentanglement for improved efficiency and scalability. We show that these techniques are practical

关键词： C++ (programming language) Concurrency control Efficiency Functional programming multicore programming Parallel processing systems Petroleum reservoir evaluation Program debugging Scalability Semantics Correctness properties Data races Disentanglement Empirical evaluations Functional languages Higher order languages Memory management Memory management techniques

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Real-time moving human detection using HOG and Fourier descriptor based on CUDA implementation

Real-time moving human detection using HOG and Fourier descr...

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Journal of Real-Time Image Processing

作者： Bahri, Haythem Chouchene, Marwa Sayadi, Fatma Ezahra Atri, Mohamed Laboratory of Electronics and Microelectronics Faculty of Sciences of Monastir University of Monastir Monastir5000 Tunisia College of Computer Science King Khalid University Abha Saudi Arabia

Real-time applications of image and video processing algorithms have seen explosive growth in number and complexity over the past decade driven by consumer, scientific and defense applications exploiting inexpensive digital video cameras and networked computing device. This growth has opened up different alternatives to greatly enhance the surveillance capabilities using new architectures and parallelization strategies developed due to the increased accessibility of multicore, multi-threaded processors along with general purpose graphics processing units (GPUs). In this paper, we present a new implementation of a moving human detection algorithm on GPU based on the programming language CUDA. In our approach, the moving object is extracted by background subtraction based on the GMM (Gaussian Mixture Model) on GPU. Then, two complementary features are extracted for moving object classification. They are contour-based description: FD or Fourier Descriptor and region-based description: HOG or Histogram of Oriented Gradient. Both descriptors will then be effectively integrated to SVM (Support Vector Machine), which is able to provide the posterior probability, to achieve better performance. The implementation of such algorithm on a GPU allows a great performance in terms of execution time since it is 19 times faster than that on a CPU. Experimental results show also that the proposed approach outperforms some existing techniques and can detect pedestrians in real-time effectively. © 2019, Springer-Verlag GmbH Germany, part of Springer Nature.

关键词： Graphics processing unit Computer graphics Fourier transforms Gaussian distribution Image segmentation multicore programming Multimedia systems Program processors Support vector machines Video cameras Video signal processing CUDA Fourier descriptors Gmm (gaussian mixture model) Histogram of oriented gradients Human detection Moving object classifications Networked computing devices Real time

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Comparing Dataflow and OpenMP programming for Speaker Recognition Applications 2019

Comparing Dataflow and OpenMP Programming for Speaker Recogn...

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10th Workshop on Parallel programming and Run-Time Management Techniques for Many-Core Architectures / 8th Workshop on Design Tools and Architectures For multicore Embedded Computing Platforms (PARMA-DITAM)

作者： Bouraoui, Hasna Castrillon, Jeronimo Jerad, Chadlia Tech Univ Dresden Dresden Germany Univ Manouba Manouba Tunisia Univ Carthage Tunis Tunisia

ISBN: (纸本)9781450363211

The still increasing number of transistors per chip offered by Moore's law, together with the Post-Dennard scaling era shifted the performance gain from frequency increase to multi-core processing. Consequently, the support of parallel execution of applications is becoming mandatory. Furthermore, the need for efficient parallel models and languages is more critical for the embedded domain, due to power consumption and memory constraints, among others. This work focuses on parallelizing an embedded speaker recognition application, which is a biometric technique for identification. While a lot of work has been done for speech recognition, fewer efforts have focused on recognizing who the speaker is. In this paper, we analyze two implementations for speaker recognition applications (SRA), namely dataflow and shared memory programming models. More precisely, we use Process Networks (PNs) as a dataflow representation, which is an intuitive way to design streaming applications. We use the language "C for Process Networks" for the dataflow implementation and OpenMP for the shared memory one. For two different target platforms, we compared two implementations using OpenMP (exploring data-level parallelism only and with pipelining) against a dataflow-based compiled implementation that allows for functional optimization. Despite faster communication over shared memory, we show that the dataflow model is superior in terms of performance (up to twice as fast).

关键词： Dataflow models Shared memory programming multicore programming Speaker recognition

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Tutorial: multicore programming using divide-and-conquer and work stealing

Tutorial: Multicore programming using divide-and-conquer and...

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ACM SIGAda's Annual International Conference on High Integrity Language Technology, HILT 2012

作者： Taft, S. Tucker AdaCore 24 Muzzey Street Lexington MA 02421 United States

This tutorial is aimed at engineers and students who are interested in learning more about parallel programming, particularly for systems with growing numbers of physical processors or cores. © 2012 Author.

ISBN: (纸本)9781450315050

关键词： multicore programming

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Real-time parallel image processing applications on multicore CPUs with OpenMP and GPGPU with CUDA

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JOURNAL OF SUPERCOMPUTING 2018年第6期74卷 2255-2275页

作者： Aydin, Semra Samet, Refik Bay, Omer Faruk Gazi Univ Ankara Turkey Ankara Univ Ankara Turkey

This paper presents real-time image processing applications using multicore and multiprocessing technologies. To this end, parallel image segmentation was performed on many images covering the entire surface of the same metallic and cylindrical moving objects. Experimental results on multicore CPU with OpenMP platform showed that by increasing the chunk size, the execution time decreases approximately four times in comparison with serial computing. The same experiments were implemented on GPGPU using four techniques: (1) Single image transmission with single pixel processing;(2) Single image transmission with multiple pixel processing;(3) Multiple image transmission with single pixel processing;and (4) Multiple image transmission with multiple pixel processing. All techniques were implemented on GeForce, Tesla K20 and Tesla K40. Experimental results of GPU with CUDA platform showed that by increasing the core number speedup is increased. Tesla K40 gave the best results of 35 and 12 (for the first technique), 36 and 13 (for the second technique), 54 and 16 (for the third technique), 71 and 17 (for the fourth technique) times improvement without and with data transmission time in comparison with serial computing. As a result, users are suggested to use Tesla K40 GPU and Multiple image transmission with multiple pixel processing to get the maximum performance.

关键词： Parallel computing Real-time image processing Image segmentation Thresholding multicore programming GPU programming

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Raising the Parallel Abstraction Level for Streaming Analytics Applications

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IEEE ACCESS 2019年 7卷 131944-131961页

作者： Mencagli, Gabriele Torquati, Massimo Griebler, Dalvan Danelutto, Marco Fernandes, Luiz Gustavo L. Univ Pisa Dept Comp Sci I-56127 Pisa Italy Pontifical Catholic Univ Rio Grande do Sul PUCRS Sch Technol BR-90619900 Porto Alegre RS Brazil

In the stream processing domain, applications are represented by graphs of operators arbitrarily connected and filled with their business logic code. The APIs of existing Stream Processing Systems (SPSs) ease the development of transformations that recur in the streaming practice (e.g., filtering, aggregation and joins). In contrast, their parallelism abstractions are quite limited since they provide support to stateless operators only, or when the state is organized in a set of key-value pairs. This paper presents how the parallel patterns methodology can be revisited for sliding-window streaming analytics. Our vision fosters a design process of the application as composition and nesting of ready-to-use patterns provided through a C++17 fluent interface. Our prototype implements the run-time system of the patterns in the FastFlow parallel library expressing thread-based parallelism. The experimental analysis shows interesting outcomes. First, our pattern-based approach allows easy prototyping of different versions of the application, and the programmer can leverage nesting of patterns to increase performance (up to 37% in one of the two considered test-bed cases). Second, our FastFlow implementation outperforms (three times faster) the handmade porting of our patterns in popular JVM-based SPSs. Finally, in the concluding part of this paper, we explore the use of a task-based run-time system, by deriving interesting insights into how to make our patterns library suitable for multi backends.

关键词： Data stream processing streaming analytics sliding-window queries parallel patterns multicore programming

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Distributed PLC Based on multicore CPUs - Architecture and programming

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IFAC-PapersOnLine 2016年第25期49卷 1-7页

作者： Milik, Adam Hrynkiewicz, Edward Institute of Electronics Silesian University of Technology of Gliwice Poland

The paper presents a complete approach to distributed control system design including architecture and programming. The system consists of distributed controllers connected with a network. A multiple core controller architecture is proposed utilizing independent bit and word units in MIMD structure. Calculation process is efficiently synchronized by original implementation of semaphored memory system. The program partitioning and distribution among processing units is made automatically by proposed compiler. For a purpose of program distribution and scheduling a graph based representation of the standard program is used. Developed conversion model enables compilation of selected standard languages into independent graph based form. The distributed controller architecture has been prototyped with use of PFGA devices that enables specific implementation and evaluation of performance. The data exchange was implemented with use of deterministic protocol based on token passing. © 2016

关键词： Distributed computer systems Closed loop control systems Computer architecture Controllers Distributed parameter control systems Electronic data interchange Field programmable gate arrays (FPGA) Graphic methods multicore programming Network architecture Program compilers Programmable logic controllers compiler Control network Controller architectures Deterministic protocols Distributed controller Distributed systems Graph based representations MIMD

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Brief Announcement: Open Cilk 18

Brief Announcement: Open Cilk

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30th ACM Symposium on Parallelism in Algorithms and Architectures (SPAA)

作者： Schardl, Tao B. Lee, I-Ting Angelina Leiserson, Charles E. MIT CSAIL Cambridge MA 02139 USA Washington Univ St Louis MO 63110 USA

ISBN: (纸本)9781450357999

Open Cilk is a new open-source platform to support Cilk multi-threaded programming, especially for researchers and teachers. Open Cilk aims to provide a full-featured implementation of Cilk that is easy to modify and extend. Based on the award-winning Tapir/LLVM compiler, Open Cilk will provide a streamlined run-time system and feature comprehensive static instrumentation for dynamic-analysis tools. As a community-infrastructure project, Open Cilk encourages contributions from researchers in the areas of languages, compilers, runtime systems, tools, libraries, and benchmarks.

关键词： Cilk multicore programming parallel algorithms parallel languages productivity tools

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Topic 11: multicore and Manycore programming

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18th International Conference on Euro-Par Parallel Processing

作者： Ayguade, Eduard Pnevmatikatos, Dionisios Eigenmann, Rudolf Lujan, Mikel Pllana, Sabri Top Comm Air Force Base CO 80914 USA

ISBN: (纸本)9783642328206

Modern multicore and manycore systems enjoy the benefits of technology scaling and promise impressive performance. However, harvesting this potential is not straightforward. While multicore and manycore processors alleviate several problems that are related to single-core processors – known as memory-, power-, or instruction-level parallelism-wall – they raise the issue of the programmability and programming effort. This topic focuses on novel solutions for multicore and manycore programmability and efficient programming in the context of generalpurpose systems.

关键词： multicore programming

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