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Virtualization of reconfigurable coprocessors in HPRC systems with multicore architecture

JOURNAL OF SYSTEMS ARCHITECTURE 2012年第6-7期58卷 247-256页

作者： Gonzalez, Ivan Lopez-Buedo, Sergio Sutter, Gustavo Sanchez-Roman, Diego Gomez-Arribas, Francisco J. Aracil, Javier Univ Autonoma Madrid Dept Elect & Commun Technol Escuela Politecn Super High Performance Comp & Networking Grp E-28049 Madrid Spain

HPRC (High-Performance Reconfigurable Computing) systems include multicore processors and reconfigurable devices acting as custom coprocessors. Due to economic constraints, the number of reconfigurable devices is usually smaller than the number of processor cores, thus preventing that a 1:1 mapping between cores and coprocessors could be achieved. This paper presents a solution to this problem, based on the virtualization of reconfigurable coprocessors. A Virtual Coprocessor Monitor (VCM) has been devised for the XtremeData XD2000i In-Socket Accelerator, and a thread-safe API is available for user applications to communicate with the VCM. Two reference applications, an IDEA cipher and an Euler CFD solver, have been implemented in order to validate the proposed architecture and execution model. Results show that the benefits arising from coprocessor virtualization outperform its overhead, specially when code has a significant software weight. (c) 2012 Elsevier B.V. All rights reserved.

关键词： High Performance Reconfigurable Computing Coprocessor virtualization multicore programming Reconfigurable hardware

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Task-oriented programming: A suitable programming model for multicore and distributed systems

Task-oriented programming: A suitable programming model for ...

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2011 10th International Symposium on Parallel and Distributed Computing, ISPDC 2011

作者： Shahrivari, Saeed Sharifi, Mohsen School of Computer Engineering Iran University of Science and Technology Tehran Iran

ISBN: (纸本)9780769545400

Current distributed computing systems comprising of commodity computers like Network of Workstations (NOW) are obliged to deploy multicore processors to raise their performance. However, because multicore processors were absent when traditional standard programming models and APIs for distributed computing such as MPI and PVM were designed, traditional models are not suitable for programming multicore processors. In this paper, we argue in favor of a powerful programming model called the task-oriented programming model. This model is recently used for programming applications for both multicore processors and distributed computing systems such as computational grids. We argue that because of simplicity and the ability of automatic scaling of applications developed under this model, the task-oriented programming model fits the requirements of programming multicore enabled systems better than traditional models like message passing or multi-threading. © 2011 IEEE.

关键词： multicore programming

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Topic 4: High-Performance Architecture and Compilers

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18th International Conference on Euro-Par Parallel Processing

作者： Veidenbaum, Alex Koziris, Nectarios Sato, Toshinori Mendelson, Avi Topic Committee United States

ISBN: (纸本)9783642328206

High-performance architecture and compilation are the foundation on which the modern computer systems are built. The two sub-topics are very strongly related and only in combination can deliver performance levels we came to expect from systems. The topic is quite broad, with sub-areas of interest ranging from multicore and multi-threaded processors to large-scale parallel machines, and from program analysis, program transformation, automatic discovery and management of parallelism, programmer productivity tools, concurrent and sequential languages, and other compiler issues.

关键词： multicore programming

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Dataflow programming in CAL-Balancing Expressiveness, Analyzability, and Implementability

Dataflow Programming in CAL-Balancing Expressiveness, Analyz...

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46th Asilomar Conference on Signals, Systems and Computers

作者： Eker, Johan Janneck, Jorn W. Ericsson Res Lund Sweden Lund Univ Dept Comp Sci S-22100 Lund Sweden

ISBN: (纸本)9781467350518

In this paper we lay out a case for the use of dataflow programming and the CAL language as a way of addressing current challenges in programming parallel hardware such as multicore systems and FPGAs. We show how the design of the CAL language balances conflicting concerns of expressiveness, analyzability, and implementability, making it a promising tool for the implementation of parallel stream processing applications. The language itself as well as the design considerations are presented and illustrated with a number of different use cases from a wide range of application domains.

关键词： multicore programming

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Multithreaded Clustering for Multi-level Hypergraph Partitioning

Multithreaded Clustering for Multi-level Hypergraph Partitio...

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26th IEEE International Parallel and Distributed Processing Symposium (IPDPS) / Workshop on High Performance Data Intensive Computing

作者： Catalyuerek, Uemit V. Deveci, Mehmet Kaya, Kamer Ucar, Bora Ohio State Univ Dept Biomed Informat Columbus OH 43210 USA CNRS & LIP ENS Lyon F-69364 Lyon France

ISBN: (纸本)9780769546759

Requirements for efficient parallelization of many complex and irregular applications can be cast as a hypergraph partitioning problem. The current-state-of-the art software libraries that provide tool support for the hypergraph partitioning problem are designed and implemented before the game-changing advancements in multi-core computing. Hence, analyzing the structure of those tools for designing multithreaded versions of the algorithms is a crucial tasks. The most successful partitioning tools are based on the multi-level approach. In this approach, a given hypergraph is coarsened to a much smaller one, a partition is obtained on the the smallest hypergraph, and that partition is projected to the original hypergraph while refining it on the intermediate hypergraphs. The coarsening operation corresponds to clustering the vertices of a hypergraph and is the most time consuming task in a multi-level partitioning tool. We present three efficient multithreaded clustering algorithms which are very suited for multi-level partitioners. We compare their performance with that of the ones currently used in today's hypergraph partitioners. We show on a large number of real life hypergraphs that our implementations, integrated into a commonly used partitioning library PaToH, achieve good speedups without reducing the clustering quality.

关键词： Multi-level hypergraph partitioning coarsening multithreaded clustering algorithms multicore programming

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Research of parallel processing technology based on multi-core

Research of parallel processing technology based on multi-co...

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2012 International Applied Mechanics, Mechatronics Automation Symposium, IAMMAS 2012

作者： Li, Xiang Li, Fei Wang, Chang-Hao Institute of Electrical and Information Engineering Shaanxi University of Science and Technology Xi'an China Shaanxi Tianyuan communication design and consultation CO. Ltd Xi'an China

ISBN: (纸本)9783037854266

In this paper five kinds of typical multi-core processers are compared from thread cache inter-core interconnect and etc. Two kinds of multi-core programming environments and some new programming languages are introduced. Thread-level speculation (TLS) and transactional memory (TM) are introduced to solve the problem of parallelization of sequential program. TLS automatically analyze and speculate the part of sequential process which can be parallel implement and then automatically generate parallel code. TM systems provide an efficient and easy mechanism for parallel programming on multi-core processors. Typical TM likes TCC UTM LogTM LogTMSE and SigTM are introduced. Combined the TLS and TM can more effectively improve the sequential program running on the multi-core processors. Typical extended TM systems to support TLS likes TCC TTM PTT and STMlite are introduced. © (2012) Trans Tech Publications Switzerland.

关键词： multicore programming

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Deferred methods: Accelerating dynamic program analysis on multicores 12

Deferred methods: Accelerating dynamic program analysis on m...

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10th International Symposium on Code Generation and Optimization, CGO 2012

作者： Ansaloni, Danilo Binder, Walter Heydarnoori, Abbas Chen, Lydia Y. University of Lugano Lugano Switzerland IBM Research Zürich Laboratory Rüschlikon Switzerland

ISBN: (纸本)9781605586359

Parallelization is attractive for speeding up dynamic program analysis on multicores. However, inter-thread communication overhead may outweigh any benefit from parallel execution. We propose deferred methods, a high-level Java framework to accelerate dynamic analysis on multicores. To minimize inter-thread communication overhead, invocations to analysis methods are automatically aggregated in thread-local buffers that are processed when full. In contrast to other approaches, our framework supports custom buffer processing strategies, eases pre-processing of buffers to reduce contention on shared data structures, and offers a synchronization mechanism to wait for the completion of previously invoked deferred methods. We also present a novel adaptive buffer processing strategy that parallelizes the analysis only when the observed workload leaves some CPU cores under-utilized. Using a profiler as case study, we show that deferred methods with the adaptive buffer processing strategy yield an average speedup of factor 4.09 on a quad-core machine. The speedup stems both from parallelization and from reduced contention. Copyright © 2012 ACM.

关键词： multicore programming

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Implementing basic computational kernels of linear algebra on multicore

Implementing basic computational kernels of linear algebra o...

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2012 16th Panhellenic Conference on Informatics, PCI 2012

作者： Michailidis, Panagiotis D. Margaritis, Konstantinos G. Department of Balkan Studies University of Western Macedonia Florina Greece Department of Applied Informatics University of Macedonia Thessaloniki Greece

ISBN: (纸本)9780769548258

This paper implements basic computational kernels of the scientific computing such as matrix - vector product, matrix product and Gaussian elimination on multi-core platforms using several parallel programming tools. Specifically, these tools are Pthreads, OpenMP, Intel Cilk++, Intel TBB, Intel ArBB, SMPSs, SWARM and Fast Flow. The aim of this paper is to present an unified quantitative and qualitative study of these tools for parallel computation of scientific computing kernels on multicore. Finally, based on this study we conclude that the Intel ArBB and SWARM parallel programming tools are the most appropriate because these give good performance and simplicity of programming. © 2012 IEEE.

关键词： multicore programming

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Redsharc: A programming Model and On-Chip Network for Multi-Core Systems on a Programmable Chip

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INTERNATIONAL JOURNAL OF RECONFIGURABLE COMPUTING 2012年第unknown期2012卷

作者： Kritikos, WilliamV. Schmidt, Andrew G. Sass, Ron Anderson, Erik K. French, Matthew UNC Charlotte ECE Dept Reconfigurable Comp Syst Labo 9201 Univ City Blvd Charlotte NC 28223 USA Univ South California Inst Informat Sci Arlington VA 22203 USA

The reconfigurable data-stream hardware software architecture (Redsharc) is a programming model and network-on-a-chip solution designed to scale tomeet the performance needs ofmulti-core Systems on a programmable chip (MCSoPC). Redsharc uses an abstract API that allows programmers to develop systems of simultaneously executing kernels, in software and/or hardware, that communicate over a seamless interface. Redsharc incorporates two on-chip networks that directly implement the API to support high-performance systems with numerous hardware kernels. This paper documents the API, describes the common infrastructure, and quantifies the performance of a complete implementation. Furthermore, the overhead, in terms of resource utilization, is reported along with the ability to integrate hard and soft processor cores with purely hardware kernels being demonstrated.

关键词： multicore programming

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An Optimized Framework for Integrated Visualization of Distributed Medical Images

An Optimized Framework for Integrated Visualization of Distr...

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International Conference on Biomedical Engineering and Informatics

作者： Zhengang Fan Jiquan Liu Ziming Yin Huilong Duan College of Biomedical Engineering and Instrument Science Yuquan Campus Zhejiang University The Key Laboratory of Biomedical Engineering Ministry of Education China Hangzhou Zhejiang Province P.R. China 310027

ISBN: (纸本)9781467311830

On the basis of traditional image-based diagnostic, there have been many research results shown that the comparative analysis would be more comprehensive, intuitive and targeted. In actual clinical environment, the comparison of medical imaging data on the clinician workstations is inefficient and cumbersome due to the limited support of an integrated way for presenting these data, and this leads to the emergence of the integrated visualization of these data. With the large amount of medical imaging data distributed in achieve servers, the integrated visualization on traditional clinician workstations often lead to poor user interaction. Based on the relatively mature framework of traditional clinician workstations, this paper has located the bottlenecks of data transmission and data parsing. In addition, it provides several optimization schemas against these bottlenecks, such as Streaming concept, multi-core programming and an optimization based on Intel IPP, to enhance the user interaction for the integrated visualization of imaging data. This optimized framework has been applied to many hospitals and proven to meet the clinical requirements.

关键词： intergrated visualization Streaming multicore programming IPP

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