QR decomposition is extensively adopted in multiple-input-multiple-output orthogonal frequency-division multiplexing wireless communication systems, and is one of the performance bottlenecks in lots of high-performanc...
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QR decomposition is extensively adopted in multiple-input-multiple-output orthogonal frequency-division multiplexing wireless communication systems, and is one of the performance bottlenecks in lots of high-performance wireless communication algorithms. To implement low processing latency QR decomposition with hardware, the authors propose a novel iterative look-ahead modified Gram-Schmidt (ILMGS) algorithm based on the traditional modified Gram-Schmidt (MGS) algorithm. They also design the corresponding triangular systolic array (TSA) architecture with the proposed ILMGS algorithm, which only needs n time slots for a n x n real matrix. For reducing the hardware overhead, they modify the TSA architecture into an iterative architecture. They also design a modified iterative architecture to further reduce the hardware overhead. The implementation results show that the normalised processing latency of the modified iterative architecture based on the proposed ILMGS algorithm is 1.36 times lower than the one based on the MGS algorithm. To the best of the authors' knowledge, the designed architecture achieves the superior latency performance than the existing works.
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