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Hybrid IT and Multi Cloud an Emerging Trend and Improved Performance in Cloud Computing

SN Computer Science 2020年第5期1卷 1-6页

作者： Gundu, Srinivasa Rao Panem, Charan Arur Thimmapuram, Anuradha Department of Computer Science Dravidian University Kuppam India Department of Electronics Goa University Goa India

In the present day scenario cloud computing is an attractive subject for IT and non IT personnel. It is a service-oriented pay per use computational model. Cloud has working models with service-oriented delivery mechanism as well as deployment-oriented infrastructure mechanism. Data centers are the backbone of cloud computing. The massive participation of public has also increased the load on the cloud servers. Proper scheduling of resources is always needed. Quality of service is to be provided as per the service level agreement. Virtualization technique is the main reason behind the huge success of cloud. Multi-cloud exchanges to optimize connectivity today, multi-cloud exchanges offer the next level in direct connectivity, allowing organizations to safely and easily expand multi-cloud capabilities. Exchanges eliminate the added worries that an open Internet can bring as well as the tedious provisioning and configuring that comes with connecting to the public Internet. Importantly, multi-cloud exchanges allow organizations to establish a single connection to multiple cloud providers at the same time through an Ethernet switching platform, rather than wrestling with multiple individual connections to cloud providers. © 2020, Springer Nature Singapore Pte Ltd.

关键词： Cloud computing Device independent computing Digital revolution Distributed computing Location independent computing Multi-cloud multiprogramming Scalability Service level agreement Service-oriented architecture Sophisticated technology Virtualization Virtualization

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Model Checking Multitask Applications for OSEK Compliant Real-Time Operating Systems

Model Checking Multitask Applications for OSEK Compliant Rea...

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17th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC)

作者： McKelvin, Mark L., Jr. Gamble, Edward B., Jr. Holzmann, Gerard J. CALTECH Jet Prop Lab Lab Reliable Software Pasadena CA 91109 USA

ISBN: (纸本)9780769545905

In the verification of multitask software in real-time embedded systems, general purpose model checkers do not inherently consider characteristics of the real-time operating system, such as priority-based scheduling, priority inversion, and protocols for protecting shared memory resources. Since explicit state model checkers generally explore all possible execution paths and task interleaving, this could potentially lead to exploring execution paths that are redundant, unnecessarily increasing verification complexity and hampering tractability. Based on this premise, in this work we investigate how one can improve the performance of explicit state model checkers, such as SPIN, for the verification of multitask applications that target real-time operating systems.

关键词： Computational modeling Computer science Embedded systems Object oriented modeling Real time systems SPIN automated verification compliant real-time operating system characteristics embedded systems execution paths explicit state model checker model checking multiprogramming multitask application multitask applications multitask software verification operating systems (computers) program verification real time embedded system real-time operating systems shared memory resources shared memory systems task interleaving

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Intelligent SRTF: A New Approach to Reduce the Number of Context Switches in SRTF 1st

Intelligent SRTF: A New Approach to Reduce the Number of Con...

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1st International Conference on Computational Intelligence and Informatics (ICCII)

作者： Bindu, C. Shoba Reddy, A. Yugandhar Reddy, P. Dileep Kumar JNTUA Coll Engn Anantapur Andhra Pradesh India

ISBN: (纸本)9789811024719;9789811024702

Throughput of the system in multiprogramming and time sharing systems mainly depends on the careful scheduling of the CPU and other I/O devices. CPU scheduling should control the waiting time, response time, turnaround time, and number of context switches. One of the most extensively used scheduling algorithms is shortest next remaining time first (SRTF), which gives the reduced amount of average waiting time. But this algorithm suffers from some drawbacks. One such is that, every upcoming process if selected for execution, causes a context switch even though it is slightly shorter than the currently running process. As the number of such situations increases, the number of context switches increases, causing the reduction in performance of the system. In this paper, we modify the traditional SRTF to intelligent SRTF, by changing the decision of the preemption, to decrease the number of context switches. The main idea of our proposed algorithm is to make a context switch only if the next process plus context switch over head is shorter than the currently running process. By this we can reduce the number of context switches and thereby the performance of the system is improved.

关键词： Throughput Scheduling Burst Preemptive Performance Queue multiprogramming

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The Effect of Moving Windows on Software Effort Estimation: Comparative Study with CART 6

The Effect of Moving Windows on Software Effort Estimation: ...

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6th International Workshop on Empirical Software Engineering in Practice (IWESEP)

作者： Amasaki, Sousuke Lokan, Chris Okayama Prefectural Univ Dept Syst Engn Okayama 7191197 Japan UNSW Canberra Sch Engn & Informat Technol Canberra ACT 2600 Australia

ISBN: (纸本)9781479966660

BACKGROUND: Several studies in software effort estimation have found that it can be effective to use a window of recent projects as training data for building an effort estimation model. The previous studies evaluated the use of a window with popular estimation models: linear regression (LR) and estimation by analogy (EbA). Many effort estimation models have been proposed, and the generality of windowing approach still remains uncertain for other effort estimation models, especially for those based on different theory. OBJECTIVE: This study investigates the effect of using a window on estimation accuracy with Classification and regression trees (CART). CART was recently found as a good performance method, and is based on a different theory from LR and EbA. METHOD: We compared the estimation accuracy of a windowing approach and growing approach with the same data set and procedure as the past studies. RESULTS: There is a difference in the estimation accuracy between using a window and not using a window. However, the effctive range of using windows on CART is narrower than that on LR. CONCLUSIONS: Windowing is also effective with CART. However, the range of effectiveness is narrower. The results contribute to the generality of the effectiveness of windowing approach.

关键词： pattern classification regression analysis software development management CART EbA LR classification and regression trees effort estimation models estimation by analogy linear regression moving windows software effort estimation windowing approach Accuracy Estimation Linear regression Market research Size measurement Software Testing effort estimation classification and regression trees Linear Regression windows dimensional measurement Software development management market research cart window windows multiprogramming computer software Pattern recognition regression analysis computer programs

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RECAP: A Region-Based Cure for the Common Cold (Cache)

RECAP: A Region-Based Cure for the Common Cold (Cache)

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19th IEEE International Symposium on High Performance Computer Architecture (HPCA)

作者： Zebchuk, Jason Cain, Harold W. Tong, Xin Srinivasan, Vijayalakshmi Moshovos, Andreas Univ Toronto Dept Elect & Comp Engn Toronto ON M5S 1A1 Canada

ISBN: (纸本)9781467355872

Virtualization has become a magic bullet to increase utilization, improve security, lower costs, and reduce management overheads. In many scenarios, the number of virtual machines consolidated onto a single processor has grown even faster than the number of hardware threads. This results in multiprogrammed virtualization where many virtual machines time-share a single processor core. Such fine-grain sharing comes at a cost;each time a virtual machine gets scheduled by the hypervisor, it effectively begins with a "cold" cache, since any cache blocks it accessed in the past have likely been evicted by other virtual machines. Recently, cache restoration prefetchers have been shown to reduce the cold cache effects caused by multiprogrammed virtualization. However, these prefetchers waste large amounts of bandwidth prefetching many useless blocks and writing and reading metadata to and from memory. Using block reuse based filtering, we enhance two existing cache restoration prefetchers and reduce their bandwidth overheads by 16% and 32%, with slowdowns of only 0.5% and 0.6%. We also propose a Region-Based Cache Restoration Prefetcher (RECAP), which groups cache blocks into coarse-grain regions of memory, and predicts which regions contain useful blocks to prefetch the next time the current virtual machine executes. Based on these predictions, and using a simple compression technique that exploits spatial locality, RECAP provides a robust prefetcher that improves performance by up to 42% for some applications and only uses 14% more bandwidth and 3.5% more power than a stride prefetcher, on average. Compared to other prefetchers designed for multiprogrammed virtualization, RECAP provides comparable performance while using an average of 12% to 27% less bandwidth, and reducing the energy-delay product of the L2 cache and main memory by 12% to 13% on average.

关键词： cache storage data compression multiprogramming power aware computing processor scheduling supervisory programs virtual machines virtualisation

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Revisiting Cache Block Superloading

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4th International Conference on High Performance Embedded Architectures and Compilers

作者： Watkins, Matthew A. McKee, Sally A. Schaelicke, Lambert Cornell Univ Sch Elect & Comp Engn Ithaca NY 14853 USA Chalmers Univ Technol Dept Comp Sci & Engn Gothenburg Sweden Intel Corp Fort Collins Design Ctr Santa Clara CA 95051 USA

ISBN: (纸本)9783540929895

Technological advances and increasingly complex and dynamic application behavior argue for revisiting mechanisms that adapt logical cache block size. to application characteristics. This approach to bridging the processor/memory performance gap has been studied before, but mostly via trace-driven simulation, looking only at. L1 caches. Given changes in hardware/software technology, we revisit the general approach: we propose a transparent, phase-adaptive, low-complexity mechanism for L2 superloading and evaluate it on a. full-system simulator for 23 SPEC CPU2000 codes. Targeting L2 benefits instruction and data fetches. We investigate cache blocks of 32-512B, confirming that no fixed size performs well for all applications: differences range from 5-49%, between best and worst. fixed block sizes. Our scheme obtains performance similar to the per application best static block size. In a few cases, we minimally decrease performance compared to the. best static size, but best size varies per application, and rarely matches real hardware. We generally improve performance over best static. choices by up to 10%. Phase adaptability particularly benefits multiprogrammed workloads with conflicting locality characteristics, yielding performance gains of 5-20%. Our approach also outperforms next-line. and delta prefetching.

关键词： multiprogramming

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Thread-specific heaps for multi-threaded programs 00

Thread-specific heaps for multi-threaded programs

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International Symposium on memory Managemnet/2nd Association-for-Computing-Machinery Special Interest Group on Programming Languages International Symposium )ISMM 2000)

作者： Steensgaard, B Microsoft Res Redmond WA 98052 USA

ISBN: (纸本)9781581132632

Garbage collection for a multi-threaded program typically involves either stopping all threads while doing the collection or involves copious amounts of synchronization between threads. However, a lot of data is only ever visible to a single thread, and such data should ideally be collected without involving other threads. Given an escape analysis, a memory management system may allocate thread-specific data in thread-specific heaps and allocate shared data in a shared heap. Garbage collection of data in a thread-specific heaps can be done independent of other threads and of data in their thread-specific heaps. For multi-threaded programs, thread-specific heaps allow reduced garbage collection latency for active threads. On multi-processor computers, thread-specific heaps allow concurrent garbage collection of different thread-specific heaps with minimal synchronization overhead. We present an escape analysis and a sample memory management system using thread-specific heaps.

关键词： multiprogramming

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A Case for Integrated Processor-Cache Partitioning in Chip Multiprocessors 09

A Case for Integrated Processor-Cache Partitioning in Chip M...

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Conference on High Performance Computing Networking, Storage and Analysis

作者： Srikantaiah, Shekhar Das, Reetuparna Mishra, Asit K. Das, Chita R. Kandemir, Mahmut Penn State Univ Dept Comp Sci & Engn University Pk PA 16802 USA

ISBN: (纸本)9781605587448

Existing cache partitioning schemes are designed in a manner oblivious to the implicit processor partitioning enforced by the operating system. This paper examines an operating system directed integrated processor-cache partitioning scheme that partitions both the available processors and the shared cache in a chip multiprocessor among different multi-threaded applications. Extensive simulations using a set of multiprogrammed workloads show that our integrated processor-cache partitioning scheme facilitates achieving better performance isolation as compared to state of the art hardware/software based solutions. Specifically, our integrated processor-cache partitioning approach performs, on an average, 20.83% and 14.14% better than equal partitioning and the implicit partitioning enforced by the underlying operating system, respectively, on the fair speedup metric on an 8 core system. We also compare our approach to processor partitioning alone and a state-of-the-art cache partitioning scheme and our scheme fares 8.21% and 9.19% better than these schemes on a 16 core system.

关键词： multiprogramming

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Characterizing Multi-threaded Applications for Designing Sharing-aware Last-level Cache Replacement Policies

Characterizing Multi-threaded Applications for Designing Sha...

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IEEE International Symposium on Workload Characterization (IISWC)

作者： Natarajan, Ragavendra Chaudhuri, Mainak Univ Minnesota Dept Comp Sci & Engn Minneapolis MN 55455 USA Indian Inst Technol Kanpur 208016 Uttar Pradesh India

ISBN: (纸本)9781479905539

Recent years have seen a large volume of proposals on managing the shared last-level cache (LLC) of chip-multiprocessors (CMPs). However, most of these proposals primarily focus on reducing the amount of destructive interference between competing independent threads of multi-programmed workloads. While very few of these studies evaluate the proposed policies on shared memory multi-threaded applications, they do not improve constructive cross-thread sharing of data in the LLC In this paper, we characterize a set of multi-threaded applications drawn from the PARSEC, SPEC OMP, and SPLASH-2 suites with the goal of introducing sharing-awareness in LLC replacement policies. We motivate our characterization study by quantifying the potential contributions of the shared and the private blocks toward the overall volume of the LLC hits in these applications and show that the shared blocks are more important than the private blocks. Next, we characterize the amount of sharing-awareness enjoyed by recent proposals compared to the optimal policy. We design and evaluate a generic oracle that can be used in conjunction with any existing policy to quantify the potential improvement that can come from introducing sharing-awareness. The oracle analysis shows that introducing sharing-awareness reduces the number of LLC misses incurred by the least-recently-used (LRU) policy by 6% and 10% on average for a 4MB and 8MB LLC respectively. A realistic implementation of this oracle requires the LLC controller to have the capability to accurately predict, at the time a block is filled into the LLC, whether the block will be shared during its residency in the LLC. We explore the feasibility of designing such a predictor based on the address of the fill and the program counter of the instruction that triggers the fill. Our sharing behavior predictability study of two history-based fill-time predictors that use block addresses and program counters concludes that achieving acceptable levels of ac

关键词： cache storage microprocessor chips multi-threading multiprogramming shared memory systems

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Performance optimization of task intensive real-time applications on multicore ECUs-A hybrid scheduler

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JOURNAL OF ENGINEERING-JOE 2021年第9期2021卷 510-516页

作者： Mishra, Geetishree Hegde, Rajeshwari BMS Coll Engn Elect & Commun Engn Bangalore Karnataka India BMS Coll Engn Elect & Telecommun Engn Bangalore Karnataka India

In the current approach of automotive electronic system design, the multicore processors have prevailed to achieve high computing performance at low thermal dissipation. Multicore processors offer functional parallelism that helps in meeting the safety critical requirements of vehicles. The number of Electronic Control Units (ECUs) in high-end cars could be reduced by conglomerating more functions into a multicore ECU. AUTOSAR stack has been designed to support the applications developed for multicore ECUs. The real challenges lie in adapting new design methods while developing sophisticated applications with multicore constraints. It is imperative to utilize the most of multicore computational capability towards enhancing the overall performance of ECUs. In this context, the scheduling of the real-time multitasking software components by the operating system is one of the challenging issues to be addressed. Here, the state-of-the-art scheduling algorithm is reviewed and its merits and limitations are identified. A hybrid scheduler has been proposed, tested and compared with the state-of-the-art algorithm that offers better performance in terms of CPU utilization, average response time and deadline missing rate both in normal and high load conditions.

关键词： real-time systems multicore constraints multiprogramming multiprocessing systems operating systems (computers) low thermal dissipation high load conditions automotive electronic system design automotive engineering embedded systems multicore ECU Software engineering techniques high-end cars state-of-the-art scheduling algorithm Multiprocessing systems Operating systems sophisticated applications Automobile electronics real-time multitasking software components design methods hybrid scheduler multicore processors functional parallelism multicore computational capability real-time applications scheduling Electronic Control Units ECUs average response time high computing performance operating system normal load conditions automotive electronics

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