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34th IEEE International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD)

作者： Vieira, Joao Roma, Nuno Falcao, Gabriel Tomas, Pedro Univ Lisbon Inst Super Tecn INESC ID Lisbon Portugal Univ Coimbra Inst Telecomunicacoes Coimbra Portugal

ISBN: (数字)9781665451550

ISBN: (纸本)9781665451550

Unlike standard accelerators, the performance of near-data processing (NDP) devices highly depends on the operation of the surrounding system, namely, the Central processing Unit (CPU) and the memory hierarchy. Therefore, to accurately evaluate the gain provided by such devices, the entire processing system must be considered. Recent proposals redesigned existing architectural simulators to estimate the performance of NDP devices. However, the conclusions that can be drawn from using these frameworks are limited, and they fail to provide full support to simulate these devices (e.g., most simulators do not allow simultaneous operation of the CPU and the NDP device). In this paper, a novel framework (called gem5-ndp) based on the gem5 architectural simulator is proposed, providing full support to the development, validation, and evaluation of novel NDP architectures. To illustrate the process of developing and integrating an NDP device with a processing system using the proposed framework, as well as to demonstrate its viability and benefits, two case studies are also proposed and thoroughly discussed. gem5-ndp significantly improves the performance evaluation confidence of NDP devices with results showing that classical approaches lead to a deviation of up to 54.9% when compared with results obtained with gem5-ndp.

关键词： near-data processing Multi-Level Memory Hierarchies Simulation Framework data-Parallel processing

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Optimizing near-data processing for Spark 42

Optimizing Near-Data Processing for Spark

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42nd IEEE International Conference on Distributed Computing Systems (ICDCS)

作者： Rachuri, Sri Pramodh Gantasala, Arun Emanuel, Prajeeth Gandhi, Anshul Foley, Robert Puhov, Peter Gkountouvas, Theodoros Lei, Hui SUNY Stony Brook Stony Brook NY 11794 USA FutureWei Santa Clara CA USA OpenInfra Labs London England

ISBN: (数字)9781665471770

ISBN: (纸本)9781665471770

Resource disaggregation (RD) is an emerging paradigm for data center computing whereby resource-optimized servers are employed to minimize resource fragmentation and improve resource utilization. Apache Spark deployed under the RD paradigm employs a cluster of compute-optimized servers to run executors and a cluster of storage-optimized servers to host the data on HDFS. However, the network transfer from storage to compute cluster becomes a severe bottleneck for big data processing. near-data processing (NDP) is a concept that aims to alleviate network load in such cases by offloading (or "pushing down") some of the compute tasks to the storage cluster. Employing NDP for Spark under the RD paradigm is challenging because storage-optimized servers have limited computational resources and cannot host the entire Spark processing stack. Further, even if such a lightweight stack could be developed and deployed on the storage cluster, it is not entirely obvious which Spark queries would benefit from pushdown, and which tasks of a given query should be pushed down to storage. This paper presents the design and implementation of a near-data processing system for Spark, SparkNDP, that aims to address the aforementioned challenges. SparkNDP works by implementing novel NDP Spark capabilities on the storage cluster using a lightweight library of SQL operators and then developing an analytical model to help determine which Spark tasks should be pushed down to storage based on the current network and system state. Simulation and prototype implementation results show that SparkNDP can help reduce Spark query execution times when compared to both the default approach of not pushing down any tasks to storage and the outright NDP approach of pushing all tasks to storage.

关键词： resource disaggregation near-data processing spark pushdown modeling

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SecNDP: Secure near-data processing with Untrusted Memory 28

SecNDP: Secure Near-Data Processing with Untrusted Memory

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28th Annual IEEE International Symposium on High-Performance Computer Architecture (HPCA)

作者： Xiong, Wenjie Ke, Liu Jankov, Dimitrije Kounavis, Michael Wang, Xiaochen Northup, Eric Yang, Jie Amy Acun, Bilge Wu, Carole-Jean Tang, Ping Tak Peter Suh, G. Edward Zhang, Xuan Lee, Hsien-Hsin S. Meta Menlo Pk CA 94025 USA Washington Univ St Louis St Louis MO USA Rice Univ Houston TX 77251 USA Cornell Univ Ithaca NY 14853 USA

ISBN: (纸本)9781665420273

Today's data-intensive applications increasingly suffer from significant performance bottlenecks due to the limited memory bandwidth of the classical von Neumann architecture. near-data processing (NDP) has been proposed to perform computation near memory or data storage to reduce data movement for improving performance and energy consumption. However, the untrusted NDP processing units (PUs) bring in new threats to workloads that are private and sensitive, such as private database queries and private machine learning inferences. Meanwhile, most existing secure hardware designs do not consider off-chip components trustworthy. Once data leaving the processor, they must be protected, e.g., via block cipher encryption. Unfortunately, current encryption schemes do not support computation over encrypted data stored in memory or storage, hindering the adoption of NDP techniques for sensitive workloads. In this paper, we propose SecNDP, a lightweight encryption and verification scheme for untrusted NDP devices to perform computation over ciphertext and verify the correctness of linear operations. Our encryption scheme leverages arithmetic secret sharing in secure Multi-Party Computation (MPC) to support operations over ciphertext, and uses counter-mode encryption to reduce the decryption latency. The security of the encryption and verification algorithm is formally proven. Compared with a non-NDP baseline, secure computation with SecNDP significantly reduces the memory bandwidth usage while providing security guarantees. We evaluate SecNDP for two workloads of distinct memory access patterns. In the setting of eight NDP units, we show a speedup up to 7.46x and energy savings of 18% over an unprotected non-NDP baseline, approaching the performance gain attained by native NDP without protection. Furthermore, SecNDP does not require any security assumption on NDP to hold, thus, using the same threat model as existing secure processors. SecNDP can be implemented without changi

关键词： Security and Privacy near-data processing Cryptography Privacy-Preserving Machine Learning

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Computing En-Route for near-data processing

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IEEE TRANSACTIONS ON COMPUTERS 2021年第6期70卷 906-921页

作者： Huang, Jiayi Majumder, Pritam Kim, Sungkeun Fulton, Troy Puli, Ramprakash Reddy Yum, Ki Hwan Kim, Eun Jung Univ Calif Santa Barbara Dept Elect & Comp Engn Santa Barbara CA 93106 USA Texas A&M Univ Dept Comp Sci & Engn College Stn TX 77845 USA Aspen Insights Ft Worth TX 76107 USA NVIDIA Santa Clara CA 95051 USA

The data explosion and faster data analysis demand have spawned emerging applications that operate over myriads of data and exhibit large memory footprints with low data reuse rate. Such characteristics lead to enormous data movements across the memory hierarchy and pose significant pressure on modern communication fabrics and memory subsystems. To mitigate the worsening gap between high processor computation density and deficient memory bandwidth, memory networks, and near-data processing techniques are proposed to keep improving system performance and energy efficiency. In this article, we propose Active-Routing, an in-network near-data processing architecture for data-flow execution, which enables computation en-route by exploiting patterns of aggregation over intermediate results. The proposed architecture leverages the massive memory cube- and vault-level parallelism as well as network concurrency to optimize the aggregation operations along a dynamically built Active-Routing Tree. It also introduces page granular computation offloading to amortize the offloading overhead and improve the throughput. Compared to the state-of-the-art processing-in-memory architecture, the evaluations show that the baseline Active-Routing can achieve up to 7x speedup with an average of 60 percent performance improvement, and reduce the energy-delay product by 80 percent across various benchmarks. Further optimizations with vault-level parallelism and page granular offloading can achieve an extra order of magnitude improvement.

关键词： Bandwidth Parallel processing Kernel Optimization Random access memory Memory management Fabrics Memory network data-flow in-network computing near-data processing processing-in-memory

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Machine Learning Migration for Efficient near-data processing 29

Machine Learning Migration for Efficient Near-Data Processin...

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29th Euromicro International Conference on Parallel, Distributed and Network-Based processing (PDP)

作者： Cordeiro, Aline S. dos Santos, Sairo R. Moreira, Francis B. Santos, Paulo C. Carro, Luigi Alves, Marco A. Z. Univ Fed Parana Dept Informat Curitiba Parana Brazil Fed Rural Univ Semiarid Dept Exact Sci & Informat Technol Angicos Brazil Univ Fed Rio Grande do Sul Informat Inst Porto Alegre RS Brazil

ISBN: (纸本)9781665414555

Machine Learning (ML) rises as a highly useful tool to analyze the vast amount of data generated in every field of science nowadays. Simultaneously, data movement inside computer systems gains more focus due to its high impact on time and energy consumption. In this contest. the near-data processing (NDP) architectures emerged as a prominent solution to increasing data by drastically reducing the required amount of data movement. For NDP, we see three main approaches, Application-Specific Integrated Circuits (ASICs), full Central processing units (CPUs) and Graphics processing Units (GPUs), or vector units integration. However, previous work considered only ASICs, CPUs and GPUs when executing ML algorithms inside the memory. In this paper, we present an approach to execute ML algorithms near-data, using a general-purpose vector architecture and applying near-data parallelism to kernels from KNN, MLP, and CNN algorithms. To facilitate this process, we also present an NDP intrinsics library to ease the evaluation and debugging tasks. Our results show speedups up to 10x for KNN, 11x for MLP, and 3x for convolution when processing near-data compared to a high-performance x86 baseline.

关键词： near-data processing Vector processing Machine Learning

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A Framework for the Automatic Generation of FPGA-based near-data processing Accelerators in Smart Storage Systems

A Framework for the Automatic Generation of FPGA-based Near-...

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35th IEEE International Parallel and Distributed processing Symposium (IPDPS)

作者： Weber, Lukas Sommer, Lukas Solis-Vasquez, Leonardo Vincon, Tobias Knoedler, Christian Bernhardt, Arthur Petrov, Ilia Koch, Andreas Tech Univ Darmstadt Embedded Syst & Applicat Grp Darmstadt Germany Reutlingen Univ DBlab Reutlingen Germany

ISBN: (纸本)9781665435772

near-data processing is a promising approach to overcome the limitations of slow I/O interfaces in the quest to analyze the ever-growing amount of data stored in database systems. Next to CPUs, FPGAs will play an important role for the realization of functional units operating close to data stored in non-volatile memories such as Flash. It is essential that the NDP-device understands formats and layouts of the persistent data, to perform operations in-situ. To this end, carefully optimized format parsers and layout accessors are needed. However, designing such FPGA-based near-data processing accelerators requires significant effort and expertise. To make FPGA-based near-data processing accessible to non-FPGA experts, we will present a framework for the automatic generation of FPGA-based accelerators capable of data filtering and transformation for key-value stores based on simple data-format specifications. The evaluation shows that our framework is able to generate accelerators that are almost identical in performance compared to the manually optimized designs of prior work, while requiring little to no FPGA-specific knowledge and additionally providing improved flexibility and more powerful functionality.

关键词： FPGA near-data processing Automatic Generation Key-Value Store database COSMOS OpenSSD

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On the Necessity of Explicit Cross-Layer data Formats in near-data processing Systems 36

On the Necessity of Explicit Cross-Layer Data Formats in Nea...

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36th IEEE International Conference on data Engineering (IEEE ICDE)

作者： Vincon, Tobias Bernhardt, Arthur Weber, Lukas Koch, Andreas Petrov, Ilia Reutlingen Univ Data Management Lab Reutlingen Germany Tech Univ Darmstadt Embedded Syst & Their Applicat Grp Darmstadt Germany

ISBN: (纸本)9781728142661

Massive data transfers in modern data-intensive systems resulting from low data-locality and data-to-code system design hurt their performance and scalability. near-data processing (NDP) and a shift to code-to-data designs may represent a viable solution as packaging combinations of storage and compute elements on the same device has become viable. The shift towards NDP system architectures calls for revision of established principles. Abstractions such as data formats and layouts typically spread multiple layers in traditional DBMS, the way they are processed is encapsulated within these layers of abstraction. The NDP-style processing requires an explicit definition of cross-layer data formats and accessors to ensure in-situ executions optimally utilizing the properties of the underlying NDP storage and compute elements. In this paper, we make the case for such data format definitions and investigate the performance benefits under NoFTL-KV and the COSMOS hardware platform.

关键词： near-data processing data format data layout

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near-data processing-Enabled and Time-Aware Compaction Optimization for LSM-tree-based Key-Value Stores 19

Near-Data Processing-Enabled and Time-Aware Compaction Optim...

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48th International Conference on Parallel processing (ICPP)

作者： Sun, Hui Liu, Wei Huang, Jianzhong Fu, Song Qiao, Zhi Shi, Weisong Anhui Univ Hefei Anhui Peoples R China Huazhong Univ Sci & Technol Wuhan Hubei Peoples R China Univ North Texas Denton TX USA Wayne State Univ Detroit MI USA

ISBN: (纸本)9781450362955

With the growing volume of storage systems, the traditional relational databases cannot reach the high performance required by big-data applications. As high-throughput alternatives to relational databases, LSM-tree-based key-value stores (KV stores in short) are confronted with degraded write performance during compaction under update-intensive workloads. To address this issue, we design and implement a time-aware compaction optimization framework for KV stores called TStore. TStore explores the near-data processing (i.e., NDP) model. It dynamically partitions compaction tasks into both host and NDP-enabled device to minimize the total time of compaction. The partitioned compaction tasks are conducted by the host and the device in parallel. The NDP-based devices exhibit low-latency, high-performance and high-bandwidth capability, thus facilitating key-value stores. TStore can not only accomplish compaction for KV stores, but also improve overall performance by removing bottleneck in compaction. Results show that the TStore with an NDP framework can achieve 3.8x and 1.9x performance improvement over LevelDB and Co-KV under the db_bench workload. In addition, the TStore-enabled KV store outperforms LevelDB and Co-KV by a factor of 3.6x and 1.9x in throughput and 72.0% and 48.9% in latency, respectively, under realistic workloads generated by YCSB.

关键词： near-data processing LSM-tree Key-Value Store Compaction Time-Aware Offloading and Partitioning

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Collaborative Compaction Optimization System using near-data processing for LSM-tree-based Key-Value Stores

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JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING 2019年第0期131卷 29-43页

作者： Sun, Hui Liu, Wei Huang, Jianzhong Shi, Weisong Anhui Univ Sch Comp Sci & Technol Key Lab Intelligent Comp & Signal Proc Minist Educ Hefei 230601 Anhui Peoples R China Huazhong Univ Sci & Technol Wuhan Natl Lab Optoelect Wuhan 430074 Hubei Peoples R China Wayne State Univ Dept Comp Sci Detroit MI 48202 USA

Log-structured merge tree (LSM-tree) based key-value stores are widely employed in large-scale storage systems. In compaction, high-level sorted string table files (i.e., SSTables) are merged with low-level overlapping key ranges and sorted for data queries. However, the compaction process incurs write amplification, which degrades system performance particularly under update-intensive workloads. Current optimizations mostly focus on reducing the overload of compaction in the host but rarely exploit parallelisms between the host and the device to fully utilize computing resources in the entire system for optimizing compaction performance. In this study, we propose Co-KV, a Collaborative Key-Value store, to improve compaction performance in LSM-tree-based key-value stores. Co-KV is based on a near-data processing (i.e., NDP) model-enabled storage device. Co-KV exhibits the following advantages: (1) it reduces write amplification and host-side CPU costs using a compaction offloading scheduling between a host computer and an NDP-enabled storage device;(2) it relieves the overload associated with data transfer between the host and the storage device;and (3) it improves the compaction of LSM-tree based key-value stores under update-intensive workloads. We employed an Open Ethernet Driver (OED), which is a real-world NDP platform as the testbed for our experiments. Extensive db_bench evaluations demonstrate that Co-KV achieves overall throughput improvements of approximately 1.75x, CPU cost reductions of approximately 68.1%, and write amplification reductions by up to 50.0% over the state-of-the-art LevelDB. Under YCSB workloads, Co-IN increases throughput by 1.7x similar to 1.9x while decreasing the write amplification and average latency by up to 50.0% and 46.3%, respectively. (C) 2019 Elsevier Inc. All rights reserved.

关键词： LSM-tree Key-value store near-data processing Compaction Partitioning Offloading

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Co-ML: A Case for Collaborative ML Acceleration using near-data processing 19

Co-ML: A Case for Collaborative ML Acceleration using Near-d...

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International Symposium on Memory Systems (MEMSYS)

作者： Aga, Shaizeen Jayasena, Nuwan Ignatowski, Mike Adv Micro Devices Inc AMD Res Sunnyvale CA 94088 USA

ISBN: (纸本)9781450372060

The growing importance of Machine Learning (ML) has led to a proliferation of accelerator designs that target ML workloads. The majority of these designs focus on accelerating compute-intensive regions of ML workloads such as general matrix multiplications (GEMMs) and convolutions. While this is a legitimate approach, we observe in this work that ML workloads also comprise data-intensive computations that manifest low compute-to-byte ratios and can often contribute considerably to the total execution time. Further, we also observe that, the presence of such computations opens up an exciting opportunity for near-data processing (NDP) architectures as they often provision for higher memory bandwidth that can benefit such computations. Based on the above observations, in this work we make a case for a more collaborative approach to ML acceleration, termed Co-ML, in which memory plays an active role and is responsible for NDP-amenable computations while the compute-intensive computations are executed on the host accelerator as before. We demonstrate how even a relatively simple NDP design can increase performance of data-intensive computations in ML by up to 20x. Further, for a suite of ML workloads we demonstrate that Co-ML can deliver speedups as high as 20% with average speedups of 14%. Finally, we show that with increasing efforts to build better accelerators for compute-intensive computations, these benefits will likely increase.

关键词： GPU HBM machine learning near-data processing

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