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23rd European Signal Processing Conference (EUSIPCO)

作者： Al-Rubaye, Ghanim A. Tsimenidis, Charalampos C. Johnston, Martin Newcastle Univ Sch Elect & Elect Engn Newcastle Upon Tyne NE1 7RU Tyne & Wear England

ISBN: (纸本)9780992862633

In this paper, we propose Irregular non-binary Low Density Parity Check (IR-NB-ldpc) codes with Signed Log Fast Fourier Transform (SL-FFT) decoding algorithm to overcome the harsh environment of power-line communication (PLC) channels. Their performance is compared with Irregular binary ldpc (IR-B-ldpc) codes using the Sum Product algorithm (SPA). The sparse parity check matrix H of both codes are constructed using progressive edge growth (PEG) algorithm with a novel initialization of the apriori log likelihood ratios (LLR) of each decoder to mitigate the highly impulsive noise in PLC channels. Numerical performance results obtained via simulations show that the proposed system at hit error rate of 10(-4) achieves a coding gain of more than 21 dB compared to uncoded system and more than 6 dB compared to IR-B-ldpc codes for the same block length in bits and rates, however, this is accomplished with higher decoding complexity.

关键词： non-binary ldpc binary-ldpc log likelihood ratios power-line communication channels OFDM

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Low Complexity Bit Reliability and Predication Based Symbol Value Selection Decoding Algorithms for non-binary ldpc Codes

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IEEE ACCESS 2020年 8卷 142691-142703页

作者： Ullah, Waheed Cheng, Ling Takawira, Fambirai Univ Witwatersrand Sch Elect & Informat Engn ZA-2000 Johannesburg South Africa

The main challenge for hardware implementation of non-binary ldpc decoding is the high computational complexity and large memory requirement. To address this challenge, five new low complexity ldpc decoding algorithms are proposed in this paper. The proposed algorithms are developed specifically towards the low complexity, yet effective, decoding of the NB ldpc codes. The proposed decoding algorithms update, iteratively, the hard decision received vector to search for the valid codeword in the vector space of Galois field (GF). The selection criterion for least reliable symbol positions is based on the information from the failed checks and the reliability information from the Galois field structure as well as from the received channel soft information. To choose the correct value for the candidate symbol, two methods are used. The first method is based on the prediction of the error symbol from the set of Galois field symbols which maximize an objective function. In the second method, individual bits are flipped based on the reliability information obtained from the channel. Algorithms 1 and 2 flip a single symbol per iteration whilst the other three algorithms 3, 4 and 5 flip multiple symbols in each iteration. The proposed voting based Algorithms 1, 2 and 5 first short list the unreliable positions using a majority voting scheme and then choose the candidate symbol value from the set of the symbols in GF(q) while not violating the field order q. These methods simplify the decoding complexity in terms of computation and memory. Results and analysis of these algorithms show an appealing tradeoff between computational complexity and bit error rate performance for NB ldpc codes.

关键词： Multiple vote non-binary ldpc iterative reliability decoding symbol flipping sum product algorithm low complexity decoding

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Trellis-Based Extended Min-Sum Algorithm for non-binary ldpc Codes and its Hardware Structure

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IEEE TRANSACTIONS ON COMMUNICATIONS 2013年第7期61卷 2600-2611页

作者： Li, Erbao Declercq, David Gunnam, Kiran Univ Cergy Pontoise ENSEA ETIS Lab CNRSUMR 8051 F-95000 Cergy Pontoise France Nvidia Corp Tegra Grp Santa Clara CA USA

In this paper, we present an improvement and a new implementation of a simplified decoding algorithm for non-binary low density parity-check codes (NB-ldpc) in Galois fields GF(q). The base algorithm that we use is the Extended Min-Sum (EMS) algorithm, which has been widely studied in the recent literature, and has been shown to approach the performance of the belief propagation (BP) algorithm, with limited complexity. In our work, we propose a new way to compute modified configuration sets, using a trellis representation of incoming messages to check nodes. We call our modification of the EMS algorithm trellis-EMS (T-EMS). In the T-EMS, the algorithm operates directly on the deviation space by considering a trellis built from differential messages, which serves as a new reliability measure to sort the configurations. We show that this new trellis representation reduces the computational complexity, without any performance degradation. In addition, we show that our modifications of the algorithm allows to greatly reduce the decoding latency, by using a larger degree of hardware parallelization.

关键词： Extended min-sum non-binary ldpc message-passing decoder trellis representation hardware implementation layered decoder

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Optimization of non-binary ldpc Coded Massive MIMO Systems With Partial Mapping and REP Detection

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IEEE ACCESS 2022年 10卷 17933-17945页

作者： Liu, Qingqing Feng, Zhijie Xu, Jin Zhang, Zhe Liu, Weihua Ding, Hanqing Beijing Inst Technol Sch Informat & Elect Beijing 100081 Peoples R China Univ Chinese Acad Sci Beijing 100049 Peoples R China Zhengzhou Univ Light Ind Sch Comp & Commun Engn Zhengzhou 450001 Peoples R China

In this work, a non-binary low density parity check (ldpc) coded high dimensional multiple input multiple output (MIMO) scheme with partial mapping for high order modulation is proposed. For the proposed scheme, when M-ary quadrature amplitude modulation (QAM) is employed, then non-binary ldpc code constructed over Galois field with order root M is used for partial mapping, where root M is an integer. At the receiver side, a real-valued expectation propagation (REP) based detection algorithm is used to couple with the non-binary decoder seamlessly. Meanwhile, the symbol-wise a-priori information returned by the non-binary decoder is used to aid the REP detection. Furthermore, a symbol-wise extrinsic information transfer (SEXIT) chart based iterative optimization algorithm is used to optimize the concatenated non-binary ldpc code. This work proposed to model the a-priori information of non-zero codes/symbols of detector/decoder as the output of a cyclic-symmetric additive white Gaussian noise (AWGN) channel and a simplified method based on interpolation is proposed to calculate the component-EXIT chart of the REP-detector for massive MIMO. The proposed method can facilitate the optimization and avoid a large amount of simulations. Both SEXIT chart based analysis and numerical simulation results demonstrate the validity of the above idea.

关键词： Decoding Receivers Complexity theory Codes Quadrature amplitude modulation Optimization Massive MIMO Massive MIMO partial mapping non-binary ldpc real-valued expectation propagation iterative optimization

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GPU-Based non-binary ldpc Decoder with Weighted Bit-Reliability Based Algorithm

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China Communications 2020年第5期17卷 78-88页

作者： Zhanxian Liu Rongke Liu Ling Zhao School of Electrical and Information Engineering Beihang UniversityBeijing 100191China

In this paper, we present a graphics processing unit(GPU)-based implementation of a weighted bit-reliability based(w BRB) decoder for non-binary ldpc(NB-ldpc) codes. To achieve coalesced memory accesses, an efficient data structure for the w BRB algorithm is proposed. Based on the Single-Instruction Multiple-Threads(SIMT) programming model, a novel mapping strategy with high intra-frame parallelism is presented to improve the latency and throughput performance. Moreover, by using Single-Instruction Multiple-Data(SIMD) intrinsics, four 8-bit message elements are packed into a 32-bit unit and simultaneously processed. Experimental results show that the proposed w BRB decoder provides good tradeoff between error performance and throughput for the codes with relatively large column degrees or high rates.

关键词： non-binary ldpc bit-reliability GPU SIMT SIMD

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Predictive Syndrome Based Low Complexity Joint Iterative Detection-Decoding Algorithm for non-binary ldpc Codes

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IEEE ACCESS 2021年 9卷 33464-33477页

作者： Ullah, Waheed Cheng, Ling Takawira, Fambirai Univ Witwatersrand Sch Elect & Informat Engn ZA-2000 Johannesburg South Africa

This paper addresses the problem of decoding non-binary low density parity check codes(ldpc) over finite field GF(q) using symbol flipping approach. To achieve low complexity reliable communication, three new algorithms for improving the bit error rate performance of the non-binary ldpc decoder are presented. The first type is the symbol flipping decoding algorithm using a flipping function based on the channel reliability to identify the least reliable symbol position. In this algorithm, if the predicted symbol value satisfies the check sum, then the value is declared as correct otherwise the value is adjusted and sent back to the QAM detector. Algorithms 2 in this paper is an improvement to iterative joint detection-decoding algorithm by using the method of iterative hard decision based majority logic to select the new candidate symbol value. The feedback value to the QAM detector is adjusted by using Euclidean distance between the current symbol and the newly selected symbol value. Algorithm 3 is a low complexity version of Algorithm 2 which is derived by applying a majority voting scheme. In the majority voting scheme, symbols are short listed first by voting and all the computation are carried out only for the short listed least reliable symbols which significantly lowers the processing complexity. Numerical results and complexity analysis show that the proposed methods have good bit error rate versus complexity trade-off for various applications when compared with some existing algorithms.

关键词： Coded modulation non-binary ldpc joint iterative detection-decoding symbol flipping decoding sum product algorithm majority logic decoding reliability based decoding QAM detector

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High-Throughput Multi-Codeword Decoder for non-binary ldpc Codes on GPU

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IEEE COMMUNICATIONS LETTERS 2018年第3期22卷 486-489页

作者： Liu, Zhanxian Liu, Rongke Hou, Yi Zhao, Ling Beihang Univ Sch Elect & Informat Engn Beijing 100191 Peoples R China

This letter presents a graphics processing unit (GPU)-based non-binary low density parity check multi-codeword decoder with both kernel execution and data transfer optimizations. A novel multi-codeword data structure and its corresponding parallelism are proposed to boost the compute unified device architecture kernel execution. Moreover, practical methods of hiding the data transfer latency are presented to improve data transfer efficiency. Experimental results demonstrate that the throughput speedups achieved by the proposed decoder range from 3.12x to 185x over various Galois fields compared with the existing works on GPU.

关键词： non-binary ldpc CUDA multi-codeword parallel decoding GPU

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Design of Convergence-Optimized non-binary ldpc Codes over binary Erasure Channel

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IEEE WIRELESS COMMUNICATIONS LETTERS 2012年第4期1卷 336-339页

作者： Yu, Yang Chen, Wen Wei, Lili Shanghai Jiao Tong Univ Dept Elect Engn Shanghai 200030 Peoples R China

In this letter, we present a hybrid iterative decoder for non-binary low density parity check (ldpc) codes over binary erasure channel (BEC), based on which the recursion of the erasure probability is derived to design non-binary ldpc codes with convergence-optimized degree distributions. The resulting one-step decoding tree is cycle-free and achieves lower decoding complexity. Experimental studies show that the proposed convergence-optimization algorithm accelerates the convergence process by 33%.

关键词： non-binary ldpc EXIT chart binary erasure channel complexity optimization

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Informed Dynamic Scheduling for Majority-Logic Decoding of non-binary ldpc Codes

Informed Dynamic Scheduling for Majority-Logic Decoding of N...

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IEEE Global Communications Conference (GLOBECOM)

作者： Qiu, Nanfan Chen, Wen Lu, Yichao Yu, Yang Shanghai Jiao Tong Univ Dept Elect Engn Shanghai 200030 Peoples R China Waseda Univ Grad Sch Informat Prod & Syst Fukuoka Japan

ISBN: (纸本)9781479913534

Recent studies show that dynamic scheduling using the latest available information is superior to the flooding scheduling. While the existing works on informed dynamic scheduling focus on belief propagation (BP) based algorithm for binary ldpc codes, in this paper we devise a novel method which is appropriate for majority-logic decoding of non-binary ldpc codes. We firstly clarify that previous methods are not suitable for majority-logic decoding of non-binary ldpc codes. Then we give a practical scheduling strategy which utilizes the stability of check nodes to select the messages for propagation. Furthermore, we discuss the computational complexity of this proposed scheme in detail. Simulation results verify that our approach can achieve better performance compared with layered and flooding schemes.

关键词： ldpc non-binary ldpc Informed dynamic scheduling Majority logic decoding

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Informed Dynamic Scheduling Strategies for Novel Majority-Logic Decoding of non-binary ldpc Codes 9

Informed Dynamic Scheduling Strategies for Novel Majority-Lo...

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9th International Conference on Signal Processing and Communication Systems (ICSPCS)

作者： Liu, Xuan Jamalipour, Abbas Univ Sydney Sch Elect & Informat Engn Sydney NSW 2006 Australia

ISBN: (纸本)9781467381185

Recent studies show that dynamic scheduling using the latest available information is superior to the flooding scheduling. While the existing works on informed dynamic scheduling focus on belief propagation (BP) based algorithm for binary ldpc codes, in this paper we devise novel methods which are appropriate for majority-logic decoding of non-binary ldpc codes. Firstly we propose a low complexity extrinsic message based decoding algorithm for non-binary ldpc codes. The novelty of this decoding algorithm lies in that we compute extrinsic messages and iteratively update the messages in every iteration. Then we propose a dynamic scheduling schemes specifically designed for majority-logic decoding of non-binary ldpc codes. The proposed scheduling method, named informed dynamic scheduling, can achieve better performance compared with the layered and the flooding schemes.

关键词： ldpc non-binary ldpc Informed dynamic scheduling Majority logic decoding

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