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New wind turbine emulator based on DC machine: hardware implementation using FPGA board for an open-loop operation

IET CIRCUITS DEVICES & SYSTEMS 2019年第6期13卷 896-902页

作者： Moussa, Intissar Bouallegue, Adel Khedher, Adel Univ Sousse Elect Engn Ecole Natl Ingenieurs Sousse LATIS Lab Adv Technol & Intelligent Syst Sousse 4023 Tunisia

This work deals with the development of an open-loop wind turbine emulator to verify the system operation with respect to the wind profile. The emulator consists essentially of a 300 W DC motor powered by DC/DC buck converter which controlled through field-programmable gate array (FPGA) and pulse-width modulation strategy. The motor rotational speed allows to imitate proportionally different wind velocity. A hardware test bench based on the fast prototyping method using MATLAB/Xilinx System Generation (XSG) environment and FPGA board of wind turbine simulator is built to validate the simulation results. Simulation and experimental results confirm the efficiency of the implemented method to make the proposed emulator able to react as a real wind in laboratory.

关键词： DC-DC power convertors machine control wind turbines DC motors field programmable gate arrays DC machine hardware implementation FPGA board open-loop operation open-loop wind turbine emulator system operation wind profile 300 W DC motor field-programmable gate array pulse-width modulation strategy motor rotational speed proportionally different wind velocity hardware test bench wind turbine simulator power 300 0 W implemented method

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Design and performance evaluation of a bidirectional isolated dc-dc converter with extended dual-phase-shift scheme

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IET POWER ELECTRONICS 2013年第5期6卷 914-924页

作者： Wen, Huiqing Su, Bin Xiao, Weidong Xian Jiaotong Liverpool Univ Dept Elect & Elect Engn Suzhou 215123 Peoples R China State Grid Corp China Hangzhou Elect Power Bur Hangzhou 310012 Zhejiang Peoples R China Masdar Inst Sci & Technol Elect Power Engn Program Abu Dhabi U Arab Emirates

This study describes the design and performance evaluation of a bidirectional isolated dc-dc converter with an extended dual-phase-shift (EDPS) scheme. The operation principle and equivalent circuits with consideration of the deadband are presented. The deadband effect with EDPS is different from the conventional phase-shift (CPS) scheme, and the corresponding compensation coefficient is determined. Different operation modes are identified with respect to phase-shift angles of EDPS and load conditions. The safe operational area is also analysed with the comparison of different operation modes. The output voltage and output power characteristics with open-loop or closed-loop operation are discussed. The average theoretical 48.5% reduction in the output voltage ripple using EDPS has been achieved. The average reduction in inductor peak and rms with EDPS are statistically calculated as 37.8 and 26.8%. The measured efficiency has improved from 68.1% using CPS to 81.9% using EDPS for low-power application.

关键词： compensation DC-DC power convertors equivalent circuits low-power electronics bidirectional isolated dc-dc converter extended dual-phase-shift scheme EDPS scheme equivalent circuits CPS scheme compensation coefficient phase-shift angles load conditions safe operational area closed-loop operation open-loop operation output power characteristics output voltage ripple

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Observer-based scheme for tuning the control of variable speed wind turbines operating in hostile environments

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IET RENEWABLE POWER GENERATION 2016年第3期10卷 418-425页

作者： Caruana, Cedric Al-Durra, Ahmed Blaabjerg, Frede Univ Malta Fac Engn Msida Malta Petr Inst Coll Engn Abu Dhabi U Arab Emirates Aalborg Univ Inst Energy Technol Aalborg Denmark

The rapid growth rate of wind energy coupled with the increasing sizes of individual wind turbines strengthens the need for optimised wind energy capture. This study utilises the unknown input observer to track the variation of the maximal value of wind turbines' power coefficient to tune the control law. The proposed observer identifies variations in the power coefficient surface over time due to the effect of the environment on the rotor blades. Simulations for both open- and closed-loop operations are shown. The proposed technique shows the potential to alleviate the performance degradation during the lifetime of wind turbines operating in hostile environments.

关键词： wind turbines power generation control observers control system synthesis rotors blades open loop systems closed loop systems angular velocity control observer-based scheme variable speed wind turbine control tuning hostile environments rapid wind energy growth rate wind energy capture optimisation maximal power coefficient value variation control law tuning rotor blades open-loop operation closed-loop operation

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A 0.6 V 1.63 fJ/c.-s. Detective open-loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System

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IEEE JOURNAL OF SOLID-STATE CIRCUITS 2019年第10期54卷 2680-2690页

作者： Hu, Yao-Sheng Huang, Li-Yu Chen, Hsin-Shu Sitronix Technol Cooperat TDDI Team Taipei 11492 Taiwan Natl Taiwan Univ Dept Elect Engn Taipei 10617 Taiwan Natl Taiwan Univ Grad Inst Elect Engn Taipei 10617 Taiwan Natl Taiwan Univ Taipei 10617 Taiwan Sitronix Technol Cooperat Design Ctr Team 2 Taipei 11492 Taiwan

In this paper, a low-power detective open-loop dynamic (DeOLD) system buffer codesigned with a SAR ADC that is pertinent for zero-capacitor touch with a display driver integration (TDDI) system is proposed. The proposed DeOLD system buffer not only blocks the supply coupling interference off the ADC but also compensates the lost charge back to the supply by actively detecting the ADC input signal. Its third-harmonic distortion is suppressed to under 70 dB. The dynamic charge sharing technique reduces the power of the charge compensators by 40% compared with the well-known pump squeezing technique. A supply reset (RST) circuit makes up the charge loss and avoids the usage of an unpractical charge compensator to save additional chip area and energy. The system buffer is open loop, which is fast and energy-efficient;furthermore, it is codesigned with a 400-kS/s 10-b SAR ADC. The system buffer provides all voltage sources for the ADC, including the reference, digital, and analog voltages. It consumes 334 nW under a 0.6-V supply. Its active area is only 0.0098 mm(2) in 40-nm CMOS technology. It achieves an signal-to-noise and distortion ratio (SNDR) of 55.96 dB, resulting in the Walden figure-of-merit (FoM(W)) of 1.63 fJ/c.-s.

关键词： Dynamic charge sharing open-loop operation SAR ADC system buffer zero-capacitor TDDI technology

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Space vector pulse-width modulation scheme for multilevel voltage inverters with duty cycle calculation based on relative vector distances

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IET POWER ELECTRONICS 2014年第4期7卷 829-839页

作者： Ovalle, Andres Ramos, Gustavo Univ Los Andes Sch Engn Elect & Elect Engn Bogota Colombia

In this study, a control scheme for multilevel inverters is formulated employing space vector pulse-width modulation. The notable formulation bases the duty cycle calculation on relative distances among constructive vectors provided by the line-neutral voltage levels of the converter topology. Furthermore, in order to locate the control vector (or reference vector) properly, Clarke transformation of instantaneous line-neutral voltages is employed. In this way, calculations of duty cycles are simplified, closed-and open-loop operations have similar approaches and linear and over modulation operations are performed with minimal variations. Also, this approach eliminates the use of trigonometric functions in order to reduce memory demands and computational capacity. The scheme is tested on a 7seven-level inverter with cascaded H-bridge topology using real-time simulation.

关键词： PWM invertors PWM power convertors transforms vectors space vector pulse-width modulation scheme multilevel voltage inverter duty cycle calculation relative vector distance converter topology Clarke transformation instantaneous line-neutral voltage level closed-loop operation open-loop operation trigonometric function computational capacity 7seven-level inverter cascaded H-bridge topology

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A 0.6 V 1.63 fJ/c.-s. Detective open-loop Dynamic System Buffer for SAR ADC in Zero-Capacitor TDDI System

A 0.6 V 1.63 fJ/c.-s. Detective Open-Loop Dynamic System Buf...

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14th IEEE Asian Solid-State Circuits Conference (A-SSCC)

ISBN: (纸本)9781538664148;9781538664131

关键词： Dynamic charge sharing open-loop operation SAR ADC system buffer zero-capacitor TDDI technology

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Circuit Analysis of A Single Phase Micro-Photovoltaic Inverter

Circuit Analysis of A Single Phase Micro-Photovoltaic Invert...

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Asia-Pacific Power and Energy Engineering Conference (APPEEC)

作者： Cai Youming Jia Youwei Li Yuan Sichuan Univ Dept Elect Engn & Informat Chengdu 610064 Peoples R China

ISBN: (纸本)9781457705472;9781457705465

Compared to the central inverter utilized in PV power generation system, modularized dc-ac converter becomes more and more popular. Dealing with hundreds of watts of energy, these micro-Photovoltaic (PV) inverters convert solar energy of each PV panel to the utility individually, with significant improvement of overall system reliability. This paper presents a case study of a single-phase micro-PV inverter, with a topology of reduced switching devices and galvanic isolation. Circuit analysis and its parameters calculation are carried out in details. Besides, a model of the proposed circuit has been built and demonstrated through simulation based on MATLAB/Simulink. The result proves the analysis of the circuit and provides theoretical validation for further research.

关键词： micro-Photovoltaic (PV) inverter types of PV modules parameters calculation open-loop operation

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