This paper proposes a unique parallel processing technique to generate a high bandwidth digital chirp signal up to 320 MHz with 200 MHz clock frequency using the approximation of the piecewise parabolic interpolation ...
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ISBN:
(纸本)9780769546193
This paper proposes a unique parallel processing technique to generate a high bandwidth digital chirp signal up to 320 MHz with 200 MHz clock frequency using the approximation of the piecewise parabolic interpolation for the applications of radar, particularly Synthetic Aperture Radar (SAR). In this work, a smart parallel processing technique with 4 threads is completely derived, implemented and exploited to increase the bandwidth of the generated chirp signals using a hybrid system based on direct digital frequency synthesizer with low cost and minimal hardware overhead, in addition to having a smaller ROM size with respect to the other existing techniques in the literature.
There are two major ways to implement depth estimation, multiple image depth estimation and single image depth estimation, respectively. The former has a high hardware cost because it uses multiple cameras but it has ...
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There are two major ways to implement depth estimation, multiple image depth estimation and single image depth estimation, respectively. The former has a high hardware cost because it uses multiple cameras but it has a simple software algorithm. Conversely, the latter has a low hardware cost but the software algorithm is complex. One of the recent trends in this field is to make a system compact, or even portable, and to simplify the optical elements to be attached to the conventional camera. In this paper, we present an implementation of depth estimation with a single image using a graphics processing unit (GPU) in a desktop PC, and achieve real-time application via our evolutional algorithm and parallel processing technique, employing a compute shader. The methods greatly accelerate the compute-intensive implementation of depth estimation with a single view image from 0.003 frames per second (fps) (implemented in MATLAB) to 53 fps, which is almost twice the real-time standard of 30 fps. In the previous literature, to the best of our knowledge, no paper discusses the optimization of depth estimation using a single image, and the frame rate of our final result is better than that of previous studies using multiple images, whose frame rate is about 20fps.
This work proposes a realization for an improved system using a unique parallel processing technique and the approximation of the piecewise parabolic interpolation, to generate digital chirp signals with a bandwidth r...
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ISBN:
(纸本)9781479969296
This work proposes a realization for an improved system using a unique parallel processing technique and the approximation of the piecewise parabolic interpolation, to generate digital chirp signals with a bandwidth reaches up to 320 MHZ for the applications of radar and particularly Synthetic Aperture Radar ( SAR). In this work, a hardware implementation for a smart parallel processing technique with 4 threads is completely derived and achieved, this implementation is done by field programmable gate array ( FPGA) technology, and exploited to increase the bandwidth of the generated chirp signals using a hybrid system based on direct digital frequency synthesizer with low cost and minimal hardware overhead, in addition to having a smaller ROM size with respect to the other existing techniques in the literature. The utilized implementation uses X5-TX platform with FPGA Xilinx Virtex5 SX95T with 512 MB DDR2 DRAM and 4MB QDR-II memory
Rapid developments in computer techniques and high performance networks have led to the widespread use of the parallel FDTD method for solving large EM problems. It is well known that the FDTD method is an embarrassin...
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ISBN:
(纸本)9781424436460
Rapid developments in computer techniques and high performance networks have led to the widespread use of the parallel FDTD method for solving large EM problems. It is well known that the FDTD method is an embarrassingly parallel algorithm, which can make an efficient use of a computer cluster to reduce the computation time almost linearly as the number of nodes is increased, provided that the code is structured correctly and is run on the 'right' platform. In this communication, we investigate the parallel performance of the parallel FDTD method on different hardware platforms.
This paper presents a parallelprocessing network, a ""transputer network"", on which the dynamic real-time simulation of a single turbine generator to infinite bus power system can be realized. Ba...
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ISBN:
(纸本)780003285X
This paper presents a parallelprocessing network, a ""transputer network"", on which the dynamic real-time simulation of a single turbine generator to infinite bus power system can be realized. Based on a second-order predictor-corrector algorithm, using the features of the transputer network, a parallel simulation model of the turbine generator is proposed. The simulation program, which is written in OCCAM, has been implemented on a four-CPU transputer network. The real-time simulation results can be obtained with fifth-order generator models. Some simulation curves and discussions are given.
Algorithms for ordering a sparse matrix A for parallel triangular factorisation and for obtaining the parallel inverse of A are given. The heuristic ordering method is based on graph manipulations. It attempts to mini...
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Algorithms for ordering a sparse matrix A for parallel triangular factorisation and for obtaining the parallel inverse of A are given. The heuristic ordering method is based on graph manipulations. It attempts to minimise the completion time of parallel triangular factorisation while preserving the sparsity of the matrix. The inversion method proposed is based on the triangular factors of A. The task of obtaining the ‘sparse inverse’of A is represented by a directed acyclic graph. The algorithm and the graph for the full inversion of A are also given. Claims are substantiated by experiments using test data from several electric networks.
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