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检索条件"主题词=parallel processors"
172 条 记 录,以下是11-20 订阅
排序:
Lower bounds for online scheduling on four processors
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JOURNAL OF SCHEDULING 2025年 1-16页
作者: Braun, O. Chung, F. Graham, R. L. Univ Calif San Diego La Jolla CA 92093 USA
We explore lower bounds concerning the makespan of any online scheduling algorithm for the parallel processor scheduling problem with four processors. We prove that any online algorithm exhibits a makespan of at least... 详细信息
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Rei: A Reconfigurable Interconnection Unit for Array-Based CNN Accelerators
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IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTING 2023年 第4期11卷 895-906页
作者: Darbani, Paria Beitollahi, Hakem Lotfi-Kamran, Pejman Iran Univ Sci & Technol Sch Comp Engn Tehran *** Iran Inst Res Fundamental Sci IPM Sch Comp Sci Tehran *** Iran
Convolutional Neural Network (CNN) is used in many real-world applications due to its high accuracy. The rapid growth of modern applications based on learning algorithms has increased the importance of efficient imple... 详细信息
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Solving a new bi-objective mathematical model for a hybrid flow shop scheduling problem with robots and fuzzy maintenance time
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COMPUTERS & INDUSTRIAL ENGINEERING 2023年 第1期182卷
作者: Ghodratnama, Ali Amiri-Aref, Mehdi Tavakkoli-Moghaddam, Reza Kharazmi Univ Fac Engn Dept Ind Engn Tehran Iran Kedge Business Sch Dept Operat Management & Informat Syst Paris France Univ Tehran Coll Engn Sch Ind Engn Tehran Iran
This paper presents a bi-objective mathematical model of a hybrid flow shop scheduling problem (HFSSP) with robots and fuzzy maintenance time. The proposed model minimizes the mean completion time of jobs and the tota... 详细信息
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Co-design of a novel CMOS highly parallel, low-power, multi-chip neural network accelerator  33
Co-design of a novel CMOS highly parallel, low-power, multi-...
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33rd Microelectronics Design & Test Symposium (MDTS)
作者: Hokenmaier, W. Jurasek, R. Bowen, E. Granger, R. Odom, D. Green Mt Semicond Inc Semicond Hardware Dev Burlington VT 05401 USA Non Von LLC Software Algorithm & Architecture Design Lyme NH USA
Why do security cameras, sensors, and siri use cloud servers instead of on-board computation? The lack of very-lowpower, high-performance chips greatly limits the ability to field untethered edge devices. We present t... 详细信息
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HEROv2: Full-Stack Open-Source Research Platform for Heterogeneous Computing
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IEEE TRANSACTIONS ON parallel AND DISTRIBUTED SYSTEMS 2022年 第12期33卷 4368-4382页
作者: Kurth, Andreas Forsberg, Bjoern Benini, Luca Integrated Syst Lab CH-8092 Zurich Switzerland Swiss Fed Inst Technol D ITET Dept Informat Technol & Elektrotech CH-8092 Zurich Switzerland Univ Bologna DEIS I-40126 Bologna BO Italy
Heterogeneous computers integrate general-purpose host processors with domain-specific accelerators to combine versatility with efficiency and high performance. To realize the full potential of heterogeneous computers... 详细信息
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Computational Analysis of parallel Techniques for Nonlinear Biomedical Engineering Problems
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ALGORITHMS 2024年 第12期17卷 575-575页
作者: Shams, Mudassir Carpentieri, Bruno Free Univ Bozen Bolzano BZ Fac Engn I-39100 Bolzano Italy Balikesir Univ Dept Math TR-10145 Balikesir Turkiye Riphah Int Univ I 14 Dept Math & Stat Islamabad 44000 Pakistan
In this study, we develop new efficient parallel techniques for solving both distinct and multiple roots of nonlinear problems at the same time. The parallel techniques represent an innovative contribution to the disc... 详细信息
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PITON: A MANYCORE PROCESSOR FOR MULTITENANT CLOUDS
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IEEE MICRO 2017年 第2期37卷 70-80页
作者: McKeown, Michael Fu, Yaosheng Tri Nguyen Zhou, Yanqi Balkind, Jonathan Lavrov, Alexey Shahrad, Mohammad Payne, Samuel Wentzlaff, David Princeton Univ Dept Elect Engn Princeton NJ 08544 USA Princeton Univ Dept Comp Sci Princeton NJ 08544 USA Princeton Univ Princeton NJ 08544 USA
PITON IS A 25-CORE MANYCORE PROCESSOR THAT REIMAGINES THE DATACENTER ARCHITECTURE, BREAKING DOWN BARRIERS BETWEEN CHIPS, NODES, AND RACKS, AND ENABLING FLEXIBILITY, PERFORMANCE, AND ENERGY EFFICIENCY AT SCALE. IT IS D... 详细信息
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Worklist-Directed Prefetching
IEEE COMPUTER ARCHITECTURE LETTERS
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IEEE COMPUTER ARCHITECTURE LETTERS 2017年 第2期16卷 170-173页
作者: Zhang, Dan Ma, Xiaoyu Chiou, Derek Univ Texas Austin Dept Elect & Comp Engn Austin TX 78712 USA
Researchers have demonstrated the benefits of hardware worklist accelerators, which offload scheduling and load balancing operations in parallel graph applications. However, many of these applications are still heavil... 详细信息
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SAT-Based Compilation to a non-vonNeumann Processor  17
SAT-Based Compilation to a non-vonNeumann Processor
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IEEE/ACM 36th International Conference on Computer-Aided Design (ICCAD)
作者: Chaudhuri, Samit Hetzel, Asmus Wave Comp Campbell CA 95008 USA Amazon Dev Ctr Berlin Germany
This paper describes a compilation technique used to accelerate dataflow computations, common in deep neural network computing, onto Coarse Grained Reconfigurable Array (CGRA) architectures. This technique has been de... 详细信息
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Evaluation and Mitigation of Radiation-Induced Soft Errors in Graphics Processing Units
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IEEE TRANSACTIONS ON COMPUTERS 2016年 第3期65卷 791-804页
作者: Goncalves de Oliveira, Daniel Alfonso Pilla, Laercio Lima Santini, Thiago Rech, Paolo Fed Univ Rio Grande Sul UFRGS Inst Informat Av Bento Goncalves9500 Campus Vale Bloco 4 Porto Alegre RS Brazil Univ Fed Santa Catarina Dept Informat & Stat Campus Univ Reitor Joao David Ferreira Lima Florianopolis SC Brazil
Graphics processing units (GPUs) are increasingly attractive for both safety-critical and High-Performance Computing applications. GPU reliability is a primary concern for both the automotive and aerospace markets and... 详细信息
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