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Telecommunications Forum (TELFOR)

作者： Aleksa Paunović Matija Dodović Marko Mišić School of Electrical Engineering University of Belgrade Belgrade Serbia

ISBN: (数字)9798350391060

ISBN: (纸本)9798350391077

New, efficient parallel paradigms and models have been one of the main focuses of the research community in the domain of high-performance computing and multiprocessing systems. It is especially emphasized with the rise of many-core processors, such as graphics processing units. The development of parallel applications for different multi-core and many-core architectures becomes even harder, as it is usually needed to maintain different codebases. In this paper, we evaluate Kokkos, a new high-level parallel programming model and framework aimed at developing portable parallel programs for different architectures. We evaluated it using five different benchmark applications on the CPU and compared the results with OpenMP counterparts. The results and experiences are discussed in the paper.

关键词： parallel programming Computational modeling High performance computing Graphics processing units Computer architecture Benchmark testing Libraries Central Processing Unit Telecommunications Multiprocessing systems

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Efficient parallel Algorithm for Detecting Longest Flow Paths in Flow Direction Grids

Efficient Parallel Algorithm for Detecting Longest Flow Path...

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International Symposium on Advanced Computing and Communication (ISACC)

作者： Karunamuni Jayarukshi Shivali Agarwal Girish K K Santosh Goudar Biswajit Bhowmik Dept. of Computer Science and Engineering Maharshi Sushrut CAS Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering Ishwarchandra Vidyasagar AIT Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat

ISBN: (数字)9798331523893

ISBN: (纸本)9798331523909

High-performance computing (HPC) has transformed the capacity to address complex computational tasks across various scientific fields by enabling the efficient processing of large datasets and intricate simulations. In hydrological modeling, a critical task is identifying the longest flow channel within a catchment, which is essential for understanding water flow patterns and managing resources. However, existing geographic information system (GIS) algorithms for flow path identification often suffer from inefficiencies and inaccuracies. To address these challenges, this paper introduces innovative parallel methods utilizing Open Multi-Processing (OpenMP), a widely-used API that supports multi-platform shared-memory parallel programming. This approach optimizes the analysis of flow direction data, resulting in faster and more accurate identification of flow channels. The results demonstrate that the proposed method outperforms current approaches, offering substantial improvements in both performance and precision. These advancements have the potential to significantly enhance hydrological modeling practices and water resource management.

关键词： Accuracy parallel programming Computational modeling Scalability Redundancy Computational efficiency Reliability parallel algorithms Water resources Geographic information systems

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Performance Impact of Removing Data Races from GPU Graph Analytics Programs

Performance Impact of Removing Data Races from GPU Graph Ana...

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IEEE International Workshop/Symposium on Workload Characterization

作者： Yiqian Liu Avery VanAusdal Martin Burtscher Department of Computer Science Texas State University San Marcos TX USA

ISBN: (数字)9798350356038

ISBN: (纸本)9798350356045

Some of the fastest CUDA codes contain "benign" data races to boost their performance. However, such races can lead to unpredictable behavior and incorrect results on other hardware and compilers, making their elimination crucial for producing reliable and portable programs. This paper investigates the performance impact of removing data races from six high-end graph analytics codes. We identify and eliminate the races from these GPU programs by adding necessary synchronization and validating their correctness. We present our race-free codes and their original versions as an open-source suite. Comparing the performance of our new codes with their baseline counterparts on multiple inputs and GPUs, we observe that race-free implementations do not always incur a performance penalty. In fact, some race-free versions are faster, with our validated maximal independent set implementation achieving a 5-11% speedup. Our findings indicate that race-free code can reach comparable or even superior performance, supporting the adoption of best practices for parallel programming.

关键词： Codes parallel programming Graphics processing units Hardware Synchronization Reliability Best practices

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Taskgraph Framework: A Competitive Alternative to the OpenMP Thread Model

Taskgraph Framework: A Competitive Alternative to the OpenMP...

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International Symposium on Advanced Computing and Communication (ISACC)

作者： Snehal Chavan Prathamesh Nile Sunil Kumar Biswajit Bhowmik Dept. of Computer Science and Engineering Maharshi Sushrut CAS Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering Maharshi Patanjali CPS Lab BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat Dept. of Computer Science and Engineering BRICS Laboratory National Institute of Technology Karnataka Mangalore Bharat

ISBN: (数字)9798331523893

ISBN: (纸本)9798331523909

OpenMP is the predominant standard for shared memory systems in high-performance computing (HPC), offering a tasking paradigm for parallelism. However, existing OpenMP implementations, like GCC and LLVM, face computational limitations that hinder performance, especially for large-scale tasks. This paper presents the Taskgraph framework, a novel solution that overcomes the limitations of traditional task dependency graphs (TDGs). Unlike conventional TDGs, which require costly reconstruction for dynamic program structures, the Taskgraph framework uses a taskgraph clause with a list of variables, enabling real-time adaptation without complete reconstruction. This approach significantly reduces overhead, making the Task-graph model highly efficient for tasks with minimal dependencies, offering a competitive alternative to the OpenMP thread model, and enhancing efficiency and adaptability in dynamic HPC environments.

关键词： Adaptation models Runtime parallel programming High performance computing Memory management parallel processing Real-time systems Intelligent systems Standards Faces

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Machine Learning-Driven Web System for Automated Sequential-to-parallel Code Transformation

Machine Learning-Driven Web System for Automated Sequential-...

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International Russian Smart Industry Conference (SmartIndustryCon)

作者： I. V. Viktorov R. F. Gibadullin Department of Computer Systems Kazan National Research Technical University named after A. N. Tupolev – KAI Kazan Russia

ISBN: (数字)9798331511241

ISBN: (纸本)9798331511258

This paper presents the design and implementation of a machine learning-driven web system for automating the transformation of sequential code into parallel code. The proposed system leverages a shared memory programming model and is built on a microservices architecture to ensure scalability and modularity. It incorporates advanced tools for constructing and analyzing Abstract Syntax Trees to generate parallel programs that adhere to Bernstein's conditions. A supervised learning mechanism, using Word2Vec for vector representation and TF-IDF for significance evaluation, enables the system to adapt and refine parallelization rules based on programmer input. Additionally, the system integrates an AMQP-based message broker to handle high-load processing efficiently and supports data storage through relational or NoSQL databases. The solution provides a robust and flexible platform for enhancing computational performance and reducing development complexity in parallel programming. The results demonstrate the feasibility and effectiveness of this approach in addressing the challenges of automating code parallelization in modern software systems.

关键词： Codes parallel programming Scalability NoSQL databases Supervised learning Microservice architectures Machine learning Syntactics Software systems Vectors

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Speedcode: Software Performance Engineering Education via the Coding of Didactic Exercises

Speedcode: Software Performance Engineering Education via th...

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IEEE International Symposium on parallel and Distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Tim Kaler Xuhao Chen Brian Wheatman Dorothy Curtis Bruce Hoppe Tao B. Schardl Charles E. Leiserson MIT CSAIL Johns Hopkins University Connective Associates

ISBN: (数字)9798350364606

ISBN: (纸本)9798350364613

This paper introduces Speedcode, an online programming platform that aims to improve the accessibility of software performance-engineering education. At its core, Speedcode provides a platform that lets users gain hands-on experience in software performance engineering and parallel programming by completing short programming exercises. Speedcode challenges users to develop fast multicore solutions for short programming problems and evaluates their code's performance and scalability in a quiesced cloud environment. Speedcode supports parallel programming using OpenCilk, a task-parallel computing platform that is open-source and easy to program, teach and use for research. Speedcode aims to reduce barriers to learning and teaching software performance engineering. It allows users to run and evaluate their code on modern multicore machines from their own computer without installing any software. This provides users an easy introduction to the topic, and enables teachers to more easily incorporate lessons on software performance engineering into their courses without incurring the onerous overhead of needing to setup computing environments for their students.

关键词： Distributed processing Multicore processing parallel programming Scalability Prototypes Software performance Encoding

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OHIO: Improving RDMA Network Scalability in MPI_Alltoall Through Optimized Hierarchical and Intra/Inter-Node Communication Overlap Design

OHIO: Improving RDMA Network Scalability in MPI_Alltoall Thr...

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IEEE Symposium on High Performance Interconnects

作者： Tu Tran Goutham Kalikrishna Reddy Kuncham Bharath Ramesh Shulei Xu Hari Subramoni Mustafa Abduljabbar Dhabaleswar K. DK Panda Department of Computer Science and Engineering The Ohio State University Columbus USA

ISBN: (数字)9798350356014

ISBN: (纸本)9798350356021

The presence of exascale computers has pushed a new boundary in computing capability, which poses performance challenges in parallel programming models on how to exploit such systems efficiently. A dominant programming model for running parallel programs is the Message Passing Interface. Among primitives provided by MPI, Alltoall is a communication-intensive operation, which is utilized by many applications and is well-known for being difficult to optimize. Alltoall algorithms can be mainly classified into flat and hierarchical. The hierarchical designs avoid the slowdown of intra-node communication by inter-node communication by decoupling them. The hierarchical designs also reduce network congestion by reducing concurrently injected messages into the network. This work demonstrates an additional benefit of hierarchical designs to improve connection scalability in RDMA networks. This is attributed to the cache thrashing happening inside network adapters. All of these advantages of hierarchical schemes collectively contribute to the network scalability of Alltoall. This motivates us to propose a further optimized hierarchical design to enhance performance and network scalability. The design is network-agnostic and evaluated on clusters with InfiniBand and Omni-Path network adapters. The proposed design achieves average latency improvements of 61.13%, 56.40%, 37.49%, and 51.90% over Open MPI + UCX, HPC-X, Intel MPI, and MVAPICH2-X at micro-benchmark level with up to 7168 cores, respectively. In addition, the evaluation at application-level with Car-Parrinello Molecular Dynamics code shows 24.98 %, 40.44 % and 50.48 % improvement in the simulation time, compared to MVAPICH2-X, Open MPI + UCX, and Intel MPI, respectively.

关键词： Computers Protocols Codes parallel programming Scalability Computational modeling Message passing

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Looking Forward: A High-Throughput Track Following Algorithm for parallel Architectures

arXiv

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arXiv 2024年

作者： Bailly-Reyre, Aurelien Bian, Lingzhu Billoir, Pierre Pérez, Daniel Hugo Cámpora Gligorov, Vladimir Vava Pisani, Flavio Quagliani, Renato Scarabotto, Alessandro Vom Bruch, Dorothea LPNHE Sorbonne Université Paris Diderot Sorbonne Paris Cité CNRS IN2P3 France Wuhan University China Universiteit Maastricht Netherlands Switzerland Switzerland Dortmund Germany Aix Marseille Univ CNRS IN2P3 CPPM France

Real-time data processing is a central aspect of particle physics experiments with high requirements on computing resources. The LHCb experiment must cope with the 30 million proton-proton bunches collision per second rate of the Large Hadron Collider (LHC), producing 109 particles/s. The large input data rate of 32 Tb/s needs to be processed in real time by the LHCb trigger system, which includes both reconstruction and selection algorithms to reduce the number of saved events. The trigger system is implemented in two stages and deployed in a custom data centre. We present Looking Forward, a high-throughput track following algorithm designed for the first stage of the LHCb trigger and optimised for GPUs. The algorithm focuses on the reconstruction of particles traversing the whole LHCb detector and is developed to obtain the best physics performance while respecting the throughput limitations of the trigger. The physics and computing performances are discussed and validated with simulated samples. © 2024, CC BY.

关键词： parallel programming

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Sample-Efficient "Clustering and Conquer" Procedures for parallel Large-Scale Ranking and Selection

arXiv

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arXiv 2024年

作者： Zhang, Zishi Peng, Yijie Guanghua School of Management Peking University China

This work seeks to break the sample efficiency bottleneck in parallel large-scale ranking and selection (R&S) problems by leveraging correlation information. We modify the commonly used "divide and conquer" framework in parallel computing by adding a correlation-based clustering step, transforming it into "clustering and conquer". This seemingly simple modification achieves the optimal sample complexity reduction for a widely used class of efficient large-scale R&S procedures. Our approach enjoys two key advantages: 1) it does not require highly accurate correlation estimation or precise clustering, and 2) it allows for seamless integration with various existing R&S procedures, while achieving optimal sample complexity. Theoretically, we develop a novel gradient analysis framework to analyze sample efficiency and guide the design of large-scale R&S procedures. We also introduce a new parallel clustering algorithm tailored for large-scale scenarios. Finally, in large-scale AI applications such as neural architecture search, our methods demonstrate superior performance. Copyright © 2024, The Authors. All rights reserved.

关键词： parallel programming

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Physically Prototyping Physics for Play: Possibilities and Practicality

Physically Prototyping Physics for Play: Possibilities and P...

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IEEE Symposium on Computational Intelligence and Games, CIG

作者： Jackson Froehlich Britton Horn Department of Computer Science Trinity University San Antonio USA

ISBN: (数字)9798350350678

ISBN: (纸本)9798350350685

Game designers commonly use paper prototyping to evaluate educational effectiveness, enjoyment, flow, and usability, while also reducing costs and exploring alternative implementations. However, creating a paper prototype that yields actionable feedback can be challenging due to the wide range of methods available, from low-fidelity sketches to high-fidelity mockups. Most paper prototypes are static and progress discretely, making it difficult to prototype physics-based games effectively, unless focusing on interfaces, narrative, or underlying systems. This paper details the creation of three prototypes of varying fidelity and metaphor for a physics-based educational game on concurrency and parallel programming. Each prototype undergoes playtesting to assess construction methods and their effectiveness in gathering player feedback.

关键词： Visualization Costs parallel programming Prototypes Focusing Games Production

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