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检索条件"主题词=partitioning algorithms"

共 15748 条记录，以下是431-440 订阅

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Simplified Data partitioning in a Consistent Hashing Based Sharding Implementation

Simplified Data Partitioning in a Consistent Hashing Based S...

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IEEE Region 10 Conference (TENCON)

作者： Venkateswaran, Narayanan Changder, Suvamoy Department of Electrical Engineering Georgia Southern University Statesboro GA USA Wireless@VT Virginia Tech Blacksburg VA USA

ISBN: (纸本)9781509011346

Sharding implementations use consistent hashing for distributing a database uniformly across the servers in the topology. Each data item in the database is identified uniquely by a sharding key. The sharding keys are hashed into a hash ring. This hash ring is split into equal sized partitions and each server is allocated an equal number of partitions. Each partition represents a portion of the database, referred to as a virtual shard. Maintaining virtual shards and presenting an unified picture of the database to the user requires complicated logic. This paper provides a mathematical analysis of the existing method of sharding and provides a more simple, efficient and flexible alternative that does not require virtual shards. The proposed method is compared to the existing method by simulating the algorithms on multiple datasets and it is shown that the expected distribution is obtained.

关键词： Servers Databases Mathematical model Topology partitioning algorithms IEEE Regions Conferences

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On partitioning two dimensional finite difference meshes for distributed memory parallel computers

On partitioning two dimensional finite difference meshes for...

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22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP)

作者： Grandjean, Anael Ucar, Bora Ecole Normale Super Lyon UMR CNRS INRIA UCBL F-69364 Lyon France Ecole Normale Super Lyon CNRS F-69364 Lyon France

ISBN: (纸本)9781479927289

We investigate the problem of partitioning finite difference meshes in two dimensions among the processors of a parallel computer. The objective is to achieve a perfect load balance while minimizing the communication cost. There are well-known graph, hypergraph, and geometry-based partitioning algorithms for this problem. The known geometric algorithms have linear running time and obtain the best results for very special mesh sizes and processor numbers. We propose another geometric algorithm. The proposed algorithm is linear;is applicable to much more cases than some well-known alternatives;obtains better results than the graph partitioning algorithms;obtains better results than the hypergraph partitioning algorithms almost always. Our algorithm also obtains better results than a known asymptotically-optimal algorithm for some small number of processors. We also catalog related theoretical results.

关键词： distributed processing finite difference methods graph theory mesh generation resource allocation distributed memory parallel computers geometry-based partitioning algorithms graph partitioning algorithms hypergraph partitioning algorithms linear running time perfect load balance two dimensional finite difference meshes Approximation algorithms Diamonds Measurement partitioning algorithms Program processors Shape Standards

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Exploiting pseudo-schedules to guide data dependence graph partitioning

Exploiting pseudo-schedules to guide data dependence graph p...

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International Conference on Parallel Architectures and Compilation Techniques

作者： Aletà, A Codina, JM Sánchez, J González, A Kaeli, D UPC Dept Comp Architecture Barcelona Spain

ISBN: (纸本)0769516203

This paper presents a new modulo scheduling algorithm for clustered microarchitectures. The main feature of the proposed scheme is that the assignment of instructions to clusters is done by means of graph partitioning algorithms that arc guided by a pseudo-scheduler This pseudo-scheduler is a simplified version of the full instruction scheduler and estimates key constraints that would be encountered in the final schedule. The final scheduling process is bi-directional and includes on-the-fly spill code generation. The proposed scheme is evaluated against previous scheduling approaches using the SPECfp95 benchmark suite. Our modeling results show, that better schedules arc obtained for most programs across a range of different architectures. For a 4-cluster VLIW architecture with 32 registers and a 2-cycle inter-cluster communication delay we obtain an average speedup of 38.5%.

关键词： Clustering algorithms Computer architecture Delay Floating-point arithmetic Microarchitecture partitioning algorithms Processor scheduling Registers Scheduling algorithm VLIW

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Spinner: Scalable Graph partitioning in the Cloud 33

Spinner: Scalable Graph Partitioning in the Cloud

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IEEE 33rd International Conference on Data Engineering (ICDE)

作者： Martella, Claudio Logothetis, Dionysios Loukas, Andreas Siganos, Georgos Vrije Univ Amsterdam Amsterdam Netherlands Facebook Menlo Pk CA USA Ecole Polytech Fed Lausanne Lausanne Switzerland Qatar Comp Res Inst Ar Rayyan Qatar

ISBN: (纸本)9781509065431

In this paper, we present a graph partitioning algorithm to partition graphs with trillions of edges. To achieve such scale, our solution leverages the vertex-centric Pregel abstraction provided by Giraph, a system for large-scale graph analytics. We designed our algorithm to compute partitions with high locality and fair balance, and focused on the characteristics necessary to reach wide adoption by practitioners in production. Our solution can (i) scale to massive graphs and thousands of compute cores, (ii) efficiently adapt partitions to changes to graphs and compute environments, and (iii) seamlessly integrate in existing systems without additional infrastructure. We evaluate our solution on the Facebook and Instagram graphs, as well as on other large-scale, real-world graphs. We show that it is scalable and computes partitionings with quality comparable, and sometimes outperforming, existing solutions. By integrating the computed partitionings in Giraph, we speedup various real-world applications by up to a factor of 5.6 compared to default hash-partitioning.

关键词： partitioning algorithms Algorithm design and analysis Facebook Production Ecosystems Scalability Convergence

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Fast Coding Unit partitioning Algorithm for HEVC

Fast Coding Unit Partitioning Algorithm for HEVC

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IEEE International Conference on Consumer Electronics (ICCE)

作者： Hou, Xiaotao Xue, Yonglin Natl Engn Lab DTV Beijing Beijing 100091 Peoples R China Tsinghua Natl Lab Informat Sci & Technol Beijing 100084 Peoples R China Tsinghua Univ Dept Elect Engn Beijing 100084 Peoples R China

ISBN: (纸本)9781479912919

The High Efficiency Video Coding (HEVC) will be the next generation video standard, which adopts several new techniques to achieve better coding efficiency compared to the current H.264. One significant progress is the way of coding architecture partitioning. HEVC employs a recursive quadtree to get the best partitioning, which means each 64x64 pixel area is analyzed in different size Coding Units (CU). Due to the large number of available partitions, this new partitioning method greatly increases the encoding time. In this paper, one fast CU partitioning algorithm based on Rate Distortion (RD) threshold to save much encoding time is proposed and the test shows that the average quality loss is less than 0.5%.

关键词： quadtrees video coding CU partitioning algorithm H.264. standard HEVC RD average quality loss coding architecture partitioning coding units encoding fast coding unit partitioning algorithm high efficiency video coding next generation video standard rate distortion recursive quadtree Algorithm design and analysis Encoding Equations Mathematical model partitioning algorithms Standards Video coding

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Application of partitioning methods for the design of parallel programs for a system of digital signal processors

Application of partitioning methods for the design of parall...

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International Conference on Parallel Computing in Electrical Engineering (PARELEC 2000)

作者： Kortke, M Schmitt, T Merker, R Dresden Univ Technol Fac Elect Engn Inst Circuits & Syst D-01062 Dresden Germany

ISBN: (纸本)076950759X

In this paper the application of partitioning methods developed for the design of parallel processor arrays is examined for the parallel program generation. The target architecture is a system of digital signal processors (DSPs) with high bandwidth communication channels. The partitioning techniques are evaluated by means of a computationally intensive algorithm: the tomographic reconstruction method.

关键词： Bandwidth Communication channels Computer architecture Design methodology Digital signal processing Digital signal processors partitioning algorithms Process design Signal processing algorithms Tomography

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An efficient partitioning algorithm of combinational CMOS circuits

An efficient partitioning algorithm of combinational CMOS ci...

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IEEE Computer-Society Annual Symposium on VLSI

作者： Shaer, B Dib, K Univ Minnesota Dept Elect & Comp Engn Duluth MN 55812 USA

ISBN: (纸本)0769514863

This paper presents an efficient algorithm to partition combinational CMOS circuits for pseudoexhaustive testing. We present the effect of the partitioning algorithm on critical paths. Our objective is to reduce the delay penalty of test cell insertion for pseudoexhaustive testing. Pseudoexhaustive testing of a combinational circuit involves applying all possible input patterns to test all of its individual cones. Our testing ensures detection of all nonredundant combinational faults. We have developed an optimization process that can be used to find the optimal size of primary input cone (N) and fanout (F) values, to be used for partitioning a given circuit. In our work, the designer can choose between the fewest number of partitioning points and the least delay in critical path. The ISCAS'85 benchmark circuits have been successfully partitioned, and when our results are compared to other partitioning methods, our algorithm makes fewer partitions.

关键词： Circuit faults Circuit testing CMOS integrated circuits CMOS technology Delay Electrical fault detection Fault detection partitioning algorithms Statistical analysis Very large scale integration

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An Improved Dynamic Vertical partitioning Technique for Semi-structured Data

An Improved Dynamic Vertical Partitioning Technique for Semi...

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IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS)

作者： Sharify, Sahel Lu, Alan Chen, Jin Bhattacharyya, Arnamoy Hashemi, Ali Koudas, Nick Amza, Cristiana Univ Toronto Toronto ON Canada

ISBN: (纸本)9781728107462

Semi-structured data such as JSON has become the de facto standard for supporting data exchange on the Web. At the same time, relational support for JSON data poses new challenges due to the large number of attributes, sparse attributes and dynamic changes in both workload and data set, which are all typical in such data. In this paper, we address these challenges through a lightweight, in-memory relational database engine prototype and a flexible vertical partitioning algorithm that uses simple heuristics to adapt the data layout for the workload, on the fly. Our experimental evaluation using the Nobench dataset for JSON data, shows that we outperform Argo, a state-of-the-art data model that also maps the JSON data format into relational databases, by a factor of 3. We also outperform Hyrise, a state-of-the-art vertical partitioning algorithm designed for in memory databases, by 24%. Furthermore, our algorithm is able to achieve around 40% better cache utilization and 35% better TLB utilization. Our experiments also show that our partitioning algorithm adapts to workload changes within a few seconds.

关键词： Layout partitioning algorithms Null value Data models Arrays Relational databases

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A design-driven partitioning algorithm for distributed Verilog simulation 07

A design-driven partitioning algorithm for distributed Veril...

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21st International Workshop on Principles of Advanced and Distributed Simulation (PADS 2007)

作者： Li, Lijun Tropper, Carl McGill Univ Sch Comp Sci Montreal PQ Canada

ISBN: (纸本)9780769528984

Many partitioning algorithms have been proposed for distributed VLSI simulation. Typically, they make use of a gate level netlist, and attempt to achieve a minimal cut size subject to a load balance constraint. The algorithm executes on a hypergraph which represents the netlist. In this paper we propose a design-driven iterative partitioning algorithm for Verilog based on module instances instead of gates. We do this in order to take advantage of the design hierarchy information contained in the modules and their instances. A Verilog instance represents one vertex in the circuit hypergraph. The vertex can be flattened into multiple vertices in the event that a load balance is not achieved by instance based partitioning. In this case the algorithm flattens the largest instance and moves gates between the partitions in order to improve the load balance. Our experiments show that this partitioning algorithm produces a smaller cutsize than is produced by hmetis on a gate-level netlist. It produces better speedup for the simulation because it takes advantage of the design hierarchy.

关键词： Algorithm design and analysis partitioning algorithms Hardware design languages Iterative algorithms Clustering algorithms Circuit simulation Very large scale integration Load management Costs Computational modeling

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Hierarchical Label partitioning for Large Scale Classification

Hierarchical Label Partitioning for Large Scale Classificati...

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Proceedings of the 2015 IEEE International Conference on Data Science and Advanced Analytics (IEEE DSAA 2015)

作者： Puget, Raphael Baskiotis, Nicolas UPMC Univ Paris 06 Sorbonne Univ CNRS LIP6 UMR 7606 4 Pl Jussieu F-75005 Paris France

ISBN: (纸本)9781467382731

Extreme classification task where the number of classes is very large has received important focus over the last decade. Usual efficient multi-class classification approaches have not been designed to deal with such large number of classes. A particular issue in the context of large scale problems concerns the computational classification complexity : best multi-class approaches have generally a linear complexity with respect to the number of classes which does not allow these approaches to scale up. Recent works have put their focus on using hierarchical classification process in order to speed-up the classification of new instances. Using a priori information on labels such as a label hierarchy allows to build an efficient hierarchical structure over the labels in order to decrease logarithmically the classification time. However such information on labels is not always available nor useful. Finding a suitable hierarchical organization of the labels is thus a crucial issue as the accuracy of the model depends highly on the label assignment through the label tree. We propose in this work a new algorithm to build iteratively a hierarchical label structure by proposing a partitioning algorithm which optimizes simultaneously the structure in terms of classification complexity and the label partitioning problem in order to achieve high classification performances. Beginning from a flat tree structure, our algorithm selects iteratively a node to expand by adding a new level of nodes between the considered node and its children. This operation increases the speed-up of the classification process. Once the node is selected, best partitioning of the classes has to be computed. We propose to consider a measure based on the maximization of the expected loss of the sub-levels in order to minimize the global error of the structure. This choice enforces hardly separable classes to be group together in same partitions at the first levels of the tree structure and it delays error

关键词： Adaptation models Cats Complexity theory Computational modeling Context Dogs partitioning algorithms

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