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检索条件"主题词=partitioning algorithms"

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A novel geometric algorithm for fast wire-optimized floorplanning 03

A novel geometric algorithm for fast wire-optimized floorpla...

引用

IEEE International Conference on Computer-Aided Design

作者： P.G. Sassone S.K. Lim School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta GA USA

ISBN: (纸本)9781581137620

As the size and complexity of VLSI circuits increase, the need for faster floorplanning algorithms also grows. In this work we introduce Traffic, a new method for creating wire- and area-optimized floorplans. Through the use of connectivity grouping, simple geometry, and efficient data structures, Traffic achieves higher result quality than Simulated Annealing (SA) in a fraction of the time. This speed allows designers to explore a large circuit design space in a reasonable amount of time, rapidly evaluate small changes to big circuits, and quickly produce initial solutions for other floorplanning algorithms.

关键词： Traffic control partitioning algorithms Shape Data structures Circuit simulation Simulated annealing Circuit synthesis Permission Optimization methods Geometry

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Blending pipe surfaces with piecewise algebraic surfaces

Blending pipe surfaces with piecewise algebraic surfaces

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Pacific Conference on Computer Graphics and Applications

作者： Chen Changsong Chen Falai Feng Yuyu Department of Mathematics University of Science and Technology Hefei Anhui China

ISBN: (纸本)0769508685

Given the positions and orientations of several pipe surfaces (cylinders) in 3D space, a scheme for constructing a piecewise algebraic surface to blend the pipe surfaces is presented. The algorithm starts with a suitable partitioning of the 3D space into tetrahedra or prisms in which the algebraic surface patches are defined. Then a smooth piecewise algebraic surface is constructed which meets the pipe surfaces with a certain order of geometric continuity. The proper choice of free parameters is briefly discussed.

关键词： Shape control Space technology Mathematics partitioning algorithms Computer graphics Irrigation Interpolation Topology Solid modeling

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Synthesis of parallel hardware implementations from synchronous dataflow graph specifications

Synthesis of parallel hardware implementations from synchron...

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Asilomar Conference on Signals, Systems & Computers

作者： M.C. Williamson E.A. Lee Department of Electrical Engineering and Computer Science University of California Berkeley CA USA

We detail a method for the partitioning of a single application specified in synchronous dataflow (SDF) into multiple independently-synthesizable, communicating VHDL hardware modules. Either synchronous or asynchronous communication is allowed, and the clock timing and control are automatically generated. We show that this method guarantees the preservation of correct functional behavior as specified in the original SDF graph, and that many choices of partitioning into multiple hardware modules are possible. The ability to break up a larger application into smaller synthesizable hardware modules can lead to efficiencies in hardware synthesis, which is faster when performed on smaller VHDL specifications. We illustrate this new method with some practical example applications that have been constructed in Ptolemy.

关键词： Hardware Digital signal processing Algorithm design and analysis Signal synthesis Application software Clocks Signal processing algorithms Design methodology Processor scheduling partitioning algorithms

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Distributed parallel adaptive clustering algorithm based on Clique and high dimensionality reduction

Distributed parallel adaptive clustering algorithm based on ...

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International Conference on Computer Sciences and Convergence Information Technology (ICCIT)

作者： LinJiaQin Shanghai University Room D605 Shangda Road Shanghai 200444

With the fast development of storage technologies, large-scale and high dimensional datasets are stored in a distributed way. It usually applies distributed clustering algorithms to cluster distributed datasets. This paper presents a distributed clustering algorithm based on Clique and high dimensionality reduction to do the distributed clustering. Moreover, the efficiency, accuracy and extendibility of clustering analysis are improved by self-adapting algorithms and the assistant of data and mission parallelism in master or child node. Through experiments, we show that DPA-CLIQU efficiently finds accurate clusters in large high dimensional datasets from a distributed system.

关键词： Clustering algorithms Algorithm design and analysis Correlation Distributed databases Parallel processing partitioning algorithms Data systems

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Fair resource allocation for the relay backhaul link in LTE-Advanced

Fair resource allocation for the relay backhaul link in LTE-...

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IEEE Conference on Wireless Communications and Networking

作者： Guenther Liebl Thiago Martins de Moraes Akin Soysal Eiko Seidel Nomor Research GmbH Munich Germany

In this work, we revisit the issue of fair resource allocation in relay-enhanced wireless networks. Our focus this time is on Type-1a relays as proposed for LTE-Advanced. The latter operate as out-band relays, i.e., the backhaul and relay access link use separate carrier frequencies. If carrier aggregation is applied at the macro base station, the backhaul carrier may also contain part of the macro access link. Assuming full buffer traffic on the downstream, we demonstrate how similar resource partitioning strategies at the base station as proposed for in-band relays can be also applied in the out-band case. Furthermore, we propose that for out-band relays, the backhaul link should be considered directly in the regular frequency-selective scheduling process for best performance vs. complexity trade-off. The presented results include the resource consumption and achievable throughput for a hot-spot scenario with 2 out-band relay nodes, as well as a comparison to the in-band case assuming same overall resource budget.

关键词： Relays Resource management Throughput Bandwidth partitioning algorithms Antennas Measurement

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Opportunistic Network Routing Based on Node Sociality and Location Information

Opportunistic Network Routing Based on Node Sociality and Lo...

引用

International Conference on Computer Supported Cooperative Work in Design

作者： Gaofeng Zhang Jia Hao Gang Xu Xing Wang Yanhe Fu Ru Yi College of Computer Science Inner Mongolia University Hohhot China

ISBN: (数字)9798350349184

ISBN: (纸本)9798350349191

Opportunistic network nodes exhibit social attributes, and existing community routing algorithms are currently designed for situations where the community structure remains fixed and do not comprehensively analyze the impact of node location information on data forwarding. Over time, the community division results do not match the current network topology structure, and it becomes challenging to select appropriate relay nodes for forwarding. In order to solve this problem, this paper proposes a community routing based on node location information-CRLI. Firstly, the communities are partitioned based on node interaction information, and then the regional affiliation and regional connectivity are defined. Based on these, the CRLI algorithm is designed to comprehensively analyze the influence of node location, movement direction, and dynamic changes in community structure on data forwarding. The experimental results show that the CRLI algorithm can effectively improve the message delivery rate and reduce overhead.

关键词： Epidemics Network topology Federated learning Heuristic algorithms Routing partitioning algorithms Relays

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Efficient initialization of Mixtures of Experts for human pose estimation

Efficient initialization of Mixtures of Experts for human po...

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IEEE International Conference on Image Processing

作者： Huazhong Ning Yuxiao Hu Thomas Huang ECE Department University of Illinois Urbana-Champaign Urbana-Champaign IL USA

This paper addresses the problem of recovering 3D human pose from a single monocular image. In the literature, Bayesian Mixtures of Experts (BME) was successfully used to represent the multimodal image-to-pose distributions. However, the expectation-maximization (EM) algorithm that learns the BME model may converge to a suboptimal local maximum. And the quality of the final solution depends largely on the initial values. In this paper, we propose an efficient initialization method for BME learning. We first partition the training set so that each subset can be well modeled by a single expert and the total regression error is minimized. Then each expert and gate of BME model is initialized on a partition subset. Our initialization method is tested on both a quasi-synthetic dataset and a real dataset (HumanEva). Results show that it greatly reduces the computational cost in training while improves testing accuracy.

关键词： Humans Bayesian methods Testing partitioning algorithms Image converters Videos Kernel Costs Computational efficiency Robustness

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Building Prioritized Pairwise Interaction Test Suites with Ant Colony Optimization

Building Prioritized Pairwise Interaction Test Suites with A...

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International Conference on Quality Software

作者： Xiang Chen Qing Gu Xin Zhang Daoxu Chen State Key Laboratory for Novel Software Technology Department of Computer Science and Technology Nanjing University Nanjing Jiangsu China

ISBN: (纸本)9781424459124

Interaction testing offers a stable cost-benefit ratio in identifying faults. But in many testing scenarios, the entire test suite cannot be fully executed due to limited time or cost. In these situations, it is essential to take the importance of interactions into account and prioritize these tests. To tackle this issue, the biased covering array is proposed and the Weighted Density Algorithm (WDA) is developed. To find a better solution, in this paper we adopt ant colony optimization (ACO) to build this prioritized pairwise interaction test suite (PITS). In our research, we propose four concrete test generation algorithms based on Ant System, Ant System with Elitist, Ant Colony System and Max-Min Ant System respectively. We also implement these algorithms and apply them to two typical inputs and report experimental results. The results show the effectiveness of these algorithms.

关键词： Ant colony optimization Software testing Software quality Concrete System testing partitioning algorithms Laboratories Computer science Fault diagnosis Costs

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Residue number systems: a key to parallelism in public key cryptography

Residue number systems: a key to parallelism in public key c...

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International Symposium on Parallel and Distributed Processing (IPDPS)

作者： K.C. Posch R. Posch Institute for Applied Information Processing Graz University of Technology Graz Austria

Public key cryptography and parallel algorithms are considered. Special attention is paid to algorithms using long integer modulo arithmetic. A modification of the commonly known RSA algorithm is taken as a candidate. So far all implementations have been more or less sequential in the sense that no partitions of a long integer among various processing elements have been performed. The proposed approach allows the use of a dedicated processor for each group of about 30 to 50 bits of a long integer. Efficiency is primarily gained when special-purpose processors are used. In this regard this work is the basis of a VLSI approach to a multiprocessor-based cryptographic design with 15 to 100 processors involved.< >

关键词： Public key cryptography Arithmetic partitioning algorithms Very large scale integration Information processing Parallel algorithms Delay Information representation

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HW/SW Co-Design of the Secure Hash Function SHA-256

HW/SW Co-Design of the Secure Hash Function SHA-256

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International Conference on Advanced Electrical Engineering (ICAEE)

作者： M. Issad N. Anane N. Guenfoud M. Debyeche Centre de Développement des Technologies Avancées CDTA Alger Algérie Université des Sciences et Technologies Houari Boumediene Bab Ezzouar

ISBN: (数字)9798350349351

ISBN: (纸本)9798350349368

Technological developments in data communication has increased the integration cryptographic algorithms. Hash functions are used in many security schemes such as digital signature/verification and block chain network. Secure Hash Algorithm-256 (SHA-256) is an irreversible hash function. Its algorithm is not only fast, but also provides a high security service. However, in terms of computations complexity, it requires a huge amount of arithmetic operations. This paper presents the implementation of SHA-256 core in reconfigurable FPGA circuit. Our work is based on Programmable System on Chip (PSoC) architecture. The Xilinx Microblaze processor is used for the system flexibility. The SHA-256 algorithm is composed by two steps, namely, the padding operation and the hash computation process to produce the 256-bit message digest. The proposed Hardware/Software (HW /SW) partitioning consists in the execution of the padding step in SW whereas the hash computation is implemented in HW within the SHA-256 core. The implementation results on Virtex-5 circuit show that a 512-bit message digest runs in 2.083 us. The PSoC hardware architecture requires 4058 Slices.

关键词： Hash functions Electrical engineering Computer architecture Hardware System-on-chip partitioning algorithms Blockchains Data communication Computational complexity Field programmable gate arrays

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