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In-Memory probabilistic computing Using Gate-Tunable Layer Pseudospins in van der Waals Heterostructures

Chinese Physics Letters 2025年第4期42卷 9-22页

作者： Jiao Xie Jun-Lin Xiong Bin Cheng Shi-Jun Liang Feng Miao Institute of Brain-Inspired Intelligence National Laboratory of Solid State MicrostructuresSchool of PhysicsCollaborative Innovation Center of Advanced MicrostructuresNanjing UniversityNanjing 210093China Institute of Interdisciplinary Physical Sciences School of ScienceNanjing University of Science and TechnologyNanjing 210094China Jiangsu Physical Science Research Center Nanjing 210093China

Layer pseudospins,exhibiting quantum coherence and precise multistate controllability,present significant potential for the advancement of future computing *** this work,we propose an in-memory probabilistic computing scheme based on the electrical manipulation of layer pseudospins in layered materials,by exploiting the interaction between real spins and layer pseudospins.

关键词： layer pseudospinsexhibiting layered materialsby real spins probabilistic computing advancement future computing technologiesin electrical manipulation layer pseudospins memory computing gate tunable layer pseudospins

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Calibration of P-bit for aligned stochastic outputs in probabilistic computing

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MATERIALS SCIENCE AND ENGINEERING B-ADVANCED FUNCTIONAL SOLID-STATE MATERIALS 2025年 317卷

作者： Soh, Keunho Kim, Ji Eun Chun, Suk Yeop Yoon, Jung Ho Sungkyunkwan Univ SKKU Sch Adv Mat & Engn Suwon 16419 South Korea Korea Inst Sci & Technol KIST Elect Mat Res Ctr Seoul 02791 South Korea Korea Univ Dept Mat Sci & Engn Seoul 02841 South Korea Korea Univ KU KIST Grad Sch Converging Sci & Technol Seoul 02841 South Korea

probabilistic computing has emerged as an innovative alternative to quantum annealing for addressing combinatorial optimization problems at ambient temperature. This study introduces a strategy for implementing and calibrating probabilistic bits using a simple structure centered on an ion-motion-mediated volatile thresholdswitching memristor. The threshold switching memristor exhibits stochastic switching properties with biasdependent controllable probabilities, enabling high-speed outputs proportional to the input signals. The probabilistic bit, as the computational unit of probabilistic computing, is calibrated by adjusting the signal amplitude and pulse width. This process achieves consistent output probabilities across multiple devices despite the deviceto-device variation inherently associated with ion-motion-dediated memristors. The calibration approach is validated through simulations of a probabilistic full subtractor operation, highlighting its efficacy in enhancing the operational accuracy and reliability. These findings underscore the potential of calibrated probabilistic bits in enhancing probabilistic computing systems.

关键词： Memristor Threshold switching probabilistic computing P -bit

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Superior probabilistic computing using operationally stable probabilistic-bit constructed by a manganite nanowire

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NATIONAL SCIENCE REVIEW 2025年第3期12卷 nwae338页

作者： Wang, Yadi Chen, Bin Gao, Wenping Ye, Biying Niu, Chang Wang, Wenbin Zhu, Yinyan Yu, Weichao Guo, Hangwen Shen, Jian Fudan Univ State Key Lab Surface Phys Shanghai 200433 Peoples R China Fudan Univ Inst Nanoelect Devices & Quantum Comp Shanghai 200433 Peoples R China Fudan Univ Dept Phys Shanghai 200433 Peoples R China Hefei Natl Lab Shanghai Branch Shanghai 201315 Peoples R China Shanghai Res Ctr Quantum Sci Shanghai 201315 Peoples R China Fudan Univ Zhangjiang Fudan Int Innovat Ctr Shanghai 201210 Peoples R China Nanjing Univ Nanjing 210093 Peoples R China

probabilistic computing has emerged as a viable approach to treat optimization problems. To achieve superior computing performance, the key aspect during computation is massive sampling and tuning on the probability states of each probabilistic bit (p-bit), demanding its high stability under extensive operations. Here, we demonstrate a p-bit constructed by a manganite nanowire that shows exceptionally high stability. The p-bit contains an electronic domain that fluctuates between metallic (low-resistance) and insulating (high-resistance) states near its transition temperature. The probability for the two states can be directly controlled by nano-ampere electrical current. Under extensive operations, the standard error of its probability values is <1.3%. Simulations show that our operationally stable p-bit plays a key role in achieving correct inference in a Bayesian network by strongly suppressing the relative error, displaying the potential for superior computing performance. Our p-bit also serves as a high-quality random number generator without extra data-processing, beneficial for cryptographic applications.

关键词： probabilistic computing manganite nanowire operational stability electronic domain dynamics

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Sigmoid probabilistic Bits Using SiOx Threshold Switching Devices for probabilistic computing

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IEEE TRANSACTIONS ON ELECTRON DEVICES 2025年第4期72卷 1738-1744页

作者： Choi, Hyeonsik Kim, Jihyun Moon, Jaehyun Kang, Seung-Youl Woo, Jiyong Kyungpook Natl Univ Sch Elect & Elect Engn Daegu 41566 South Korea Elect & Telecommun Res Inst Daejeon 34129 South Korea

We present probabilistic bits(p-bits)implemented using a simple and fabrication-friendly Ti/SiOx/Ti stack for probabilistic computing. Sputter-deposited thin SiOx films (<10 nm) exhibit threshold switching (TS) behavior under dc characterization, producing continuous output voltage (Vout) oscillations in response to a given input voltage (Vin) pulse. Whena chemically reactive Ti scavenging layer is introduced, nonuniform TS properties are observed, resulting in switching voltage (or resistance) variability and unexpected oscillation failures. Consequently, Voutoscillations begin to be detected in the form of random spikes, emulatingthe probability of representing data as "1" (P1). Notably,we demonstrate that when the SiOx layer is sandwiched between Ti scavengers at both interfaces, the value ofP1can be controlled between 0 and 1 in an inverselyproportional relationship toVin. This sigmoidP1curvederived from Ti/SiOx/Ti p-bits plays a crucial role inexecuting simulated annealing (SA) algorithms. Thiscapability is validated through MATLAB simulations, where the approach is applied to solve vehicle routing problems(VRPs) by identifying optimal solutions

关键词： Oscillators Switches probabilistic logic Temperature measurement Resistance Films probabilistic computing Threshold voltage Sputtering Magnetic tunneling probabilistic bits probabilistic computing SiOx threshold switching (TS) voltage oscillation

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Advancing Neural Network Performance with probabilistic computing for ReLU Function

Advancing Neural Network Performance with Probabilistic Comp...

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International Conference on VLSI Design

作者： Amit Singh Amit Kumar Jangid B. Srinivasu School of Computing & Electrical Engineering (SCEE) Indian Institute of Technology Mandi Mandi India

ISBN: (数字)9798331522445

ISBN: (纸本)9798331522452

probabilistic computing (using p-bits), based on stochastic computing, can operate in an invertible mode, enabling bidirectional operations. This functionality addresses significant challenges, improves neural network training, and opens new possibilities in neural networks. This article presents a framework and robust approach for designing p-circuits of logic circuits using p-bits to enhance probabilistic computing. This paper presents the design of a 2 × 1 multiplexer, a two-input non-imply logic gate (AB), and a ReLU activation function using the Hamiltonian method. Further, this paper presents two designs of ReLU, one using AND gate while the second design uses a non-imply logic gate. The non-imply gate based ReLU requires fewer number of p-bits. In particular, a 10-bit ReLU takes 20 p-bits, with ten inputs and ten outputs. Further, the proposed approach results the design with a lower graph density of 0.26 for the 5-bit proposed ReLU, whereas the best existing design has a graph density of 0.45. The proposed p-circuits were simulated, and results demonstrate the invertible nature of the p-circuits,

关键词： Multiplexing Training Embedded systems Logic circuits Neural networks Logic gates Very large scale integration probabilistic logic probabilistic computing

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probabilistic computing based on spintronics technology

Probabilistic computing based on spintronics technology

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IEEE Silicon Nanoelectronics Workshop (SNW)

作者： Fukami, Shunsuke Borders, William A. Pervaiz, Ahmed Z. Camsari, Kerem Y. Datta, Supriyo Ohno, Hideo Tohoku Univ Res Inst Elect Commun Lab Nanoelect & Spintron Sendai Miyagi Japan Tohoku Univ Ctr Innovat Integrated Elect Syst Sendai Miyagi Japan Tohoku Univ Ctr Spintron Res Network Sendai Miyagi Japan Tohoku Univ Ctr Sci & Innovat Spintron Sendai Miyagi Japan Tohoku Univ WPI Adv Inst Mat Res Sendai Miyagi Japan Purdue Univ Sch Elect & Comp Engn W Lafayette IN 47907 USA

ISBN: (纸本)9781728197357

There have been increasing demands on realizing computing hardware capable of addressing complex tasks that classical von-Neumann computers cannot readily execute. Here we show an unconventional computing scheme - probabilistic computing - based on a spintronics technology, which is promising to address various computationally hard problems. We present a proof-of-concept of the probabilistic computer with stochastic magnetic tunnel junctions, that can perform optimization problems at room temperature.

关键词： probabilistic computing Spintronics Magnetic tunnel junction Optimization problem

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Low Power Motion Estimation Based on probabilistic computing

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY 2014年第1期24卷 1-14页

作者： Dhoot, Charvi Chau, Lap-Pui Chowdhury, Shubhajit Roy Mooney, Vincent J., III Int Inst Informat Technol Hyderabad 5000032 Andhra Pradesh India Nanyang Technol Univ Inst Sustainable & Appl Infodynam Singapore 639798 Singapore Nanyang Technol Univ Sch Elect & Elect Engn Singapore 639798 Singapore Georgia Inst Technol Sch Elect & Comp Engn Atlanta GA 30332 USA

As CMOS technology driven by Moore's law has approached device sizes in the range of 5-20 nm, noise immunity of such future technology nodes is predicted to decrease considerably, eventually affecting the reliability of computations through them. A shift in the design paradigm is expected from 100% accurate computations to probabilistic computing with accuracy dependent on the target application or circuit specifications. One model developed for CMOS technology that emulates the erroneous behavior predicted is termed probabilistic CMOS (PCMOS). In this paper, we propose a PCMOS-based architecture implementation for traditional motion estimation algorithms and show that up to 57% energy savings are possible for different existing motion estimation algorithms. Furthermore, algorithmic modifications are proposed that can enhance the energy savings to 70% with a PCMOS architectural implementation. About 1.8-5 dB improvement in peak signal-to-noise ratio under energy savings of 57% to 70% for two different motion estimation algorithms is shown, establishing the resilience of the proposed algorithm to probabilistic computing over the comparable conventional algorithm.

关键词： Error resilient design low power design motion estimation probabilistic CMOS architecture probabilistic computing

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Fully CMOS-Based p-Bits with a Bistable Resistor for probabilistic computing

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ADVANCED FUNCTIONAL MATERIALS 2024年第22期34卷 2307935-2307935页

作者： Kim, Jaehyun Han, Joon-Kyu Maeng, Ho-Young Han, Janguk Jeon, Jeong Woo Jang, Yoon Ho Woo, Kyung Seok Choi, Yang-Kyu Hwang, Cheol Seong Seoul Natl Univ Dept Mat Sci & Engn Gwanak ro 1 Seoul 08826 South Korea Seoul Natl Univ Interuniv Semicond Res Ctr Gwanak ro 1 Seoul 08826 South Korea Korea Adv Inst Sci & Technol KAIST Sch Elect Engn 291 Daehak ro Daejeon 34141 South Korea

probabilistic computing can solve complex combinatorial optimization problems more efficiently than conventional deterministic computing. A probabilistic bit (p-bit) with an n-p-n bistable resistor (biristor) is demonstrated for probabilistic computing. It is fabricated on an 8-inch wafer with complementary metal-oxide-semiconductor (CMOS) compatible technologies. Its stochastic behavior of threshold switching, which is based on the phenomenon of a single transistor latch, provides output with a Boltzmann distribution. The p-bit is composed of a biristor, a serial resistor, and a comparator. The output probability of the biristor-based p-bits shows a sigmoidal relationship with the input voltage, showing typical p-bit characteristics. Invertible Boolean logic operations with p-bits are demonstrated, and weighted maximum Boolean satisfiability problems are solved with high energy efficiency and accuracy. The biristor-based p-bits with perfect CMOS compatibility show sufficient device stability, demonstrating the possibility of large-scale integration with a p-bit array for complex optimization solvers.

关键词： biristors invertible logic maximum-SAT probabilistic bit (p-bit) probabilistic computing

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Hydrogenated VO2 Bits for probabilistic computing

IEEE ELECTRON DEVICE LETTERS

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IEEE ELECTRON DEVICE LETTERS 2023年第10期44卷 1776-1779页

作者： Deng, Sunbin Park, Tae Joon Yu, Haoming Saha, Arnob Islam, A. N. M. Nafiul Wang, Qi Sengupta, Abhronil Ramanathan, Shriram Purdue Univ Sch Mat Engn W Lafayette IN 47907 USA Penn State Univ Sch Elect Engn & Comp Sci University Pk PA 16802 USA

The stochastic nature of electronic phase transitions can serve as a random number generating source. This work reports probabilistic bits (p-bits) based on hydrogen-doped vanadium oxide (H-VO2) devices with tunable insulator-metal transition (IMT) characteristics. Hydrogen donor doping reduces ground state resistance and enables control over threshold switching voltage in the post-fabricated devices. Through a paired-pulse scheme, the H-VO2 devices could generate stochastic bit sequences with adjustable switching probabilities. The sequence with a p-bit value of 0.488 could pass 14 out of 15 National Institute of Standards and Technology (NIST) random and pseudorandom number generator tests.

关键词： Insulator-to-metal transition Mott insulator hydrogen doping p-bit probabilistic computing

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probabilistic-Bits Based on Ferroelectric Field-Effect Transistors for probabilistic computing

IEEE ELECTRON DEVICE LETTERS

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IEEE ELECTRON DEVICE LETTERS 2023年第8期44卷 1356-1359页

作者： Luo, Sheng He, Yihan Cai, Baofang Gong, Xiao Liang, Gengchiau Natl Univ Singapore Dept Elect & Comp Engn Singapore 117583 Singapore

A probabilistic bit (p-bit) is the fundamental building block in the circuit of probabilistic computing (PC), and it produces a random binary bitstream with tunable probability. Utilizing the randomness induced by thermal noise-induced lattice vibration in the ferroelectric (FE) material, we propose the p-bits based on stochastic ferroelectric FET (FeFET). The domain dynamic is revealed to play crucial roles in FE p-bits' stochasticity, as the domain coupling suppresses the dipole fluctuation. The proposed FE p-bits possess the advantages of both extremely low hardware cost and scalability for p-bit circuitry, rendering it a promising candidate for PC.

关键词： FeFET probabilistic-bit probabilistic computing dynamic model multi-domain system

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