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Evolving Hierarchical Low Disruption Fault Tolerance Strategies for a Novel programmable Device

Evolving Hierarchical Low Disruption Fault Tolerance Strateg...

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IEEE International Conference on Evolvable Systems (ICES)

作者： Lawson, David M. R. Walker, James Alfred Trefzer, Martin A. Bale, Simon J. Tyrrell, Andy M. Univ York Dept Elect Intelligent Syst Grp York YO10 5DD N Yorkshire England

ISBN: (纸本)9781479944798

Faults can occur in transistor circuits at any time, and increasingly so as fabrication processes continue to shrink. This paper describes the use of evolution in creating fault recovery strategies for use on the PAnDA architecture. Previous work has shown how such strategies, applied in a random but biased fashion can be used to overcome transistor faults and also how, without knowledge of the fault, the average time to find a fix could be reduced. This work presents a further optimisation where an Evolutionary Algorithm (EA) is used to optimise the order that deterministic strategies are applied to a faulty circuit in order to reduce the average time to find a fix. The two methods are compared and this comparison is used to set the path for future work.

关键词： evolutionary computation fault tolerance programmable logic arrays reconfigurable architectures transistor circuits EA PAnDA architecture evolutionary algorithm fault recovery strategies hierarchical low disruption fault tolerance strategies programmable analogue and digital array architecture programmable device transistor faults Analytical models Circuit faults Computed tomography Computer architecture Logic gates MOS devices Transistors transistor circuits evolutionary algorithm programmable device programmable logic arrays Circuit faults Fault tolerance Reconfigurable architectures Computer architecture METAL OXIDE SEMICONDUCTORS Transistor Device Component Logic gates ANALYSIS MODELS Policies and plans X-Ray Computed Tomography

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Optimising Ring Oscillator Frequency on a Novel FPGA Device via Partial Reconfiguration

Optimising Ring Oscillator Frequency on a Novel FPGA Device ...

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IEEE International Conference on Evolvable Systems (ICES)

作者： Campos, Pedro B. Trefzer, Martin A. Walker, James Alfred Bale, Simon J. Tyrrell, Andy M. Univ York Dept Elect Intelligent Syst Grp York YO10 5DD N Yorkshire England

ISBN: (纸本)9781479944798

The random variations which are present at sub-micron technology nodes have been proven to have significant impact on both yield and device performance. The circuit-scale effects of transistor variability for a particular architecture are hard to estimate, and device manufacturers face the risk of functional failures due to these stochastic variations, which is a growing problem for the FPGA community and the circuit design community in general. The novel PAnDA architecture aims to tackle some of those effects by allowing post-fabrication reconfiguration of the fabric, which in turn makes it possible to both optimise performance of a singular chip and to reduce the impact that these adverse effects have on manufacturing yield. A series of 3 stage ring oscillator circuits are mapped onto the PAnDA fabric, and a Genetic Algorithm is used to find a configuration which minimises the difference in frequency between the oscillator outputs and a target. Combinations of transistor sizes are used to induce changes in the performance of the logic blocks. A configuration is found which reduces the difference in frequencies to less than 1.5%.

关键词： field programmable gate arrays genetic algorithms integrated circuit manufacture integrated circuit technology oscillators FPGA device PAnDA architecture PAnDA fabric circuit scale effects genetic algorithm logic blocks manufacturing yield partial reconfiguration post-fabrication reconfiguration programmable analogue and digital array architecture random variations ring oscillator frequency stochastic variations submicron technology nodes transistor variability Delays Fabrics Field programmable gate arrays Integrated circuit modeling Ring oscillators Routing Transistors Field programmable gate arrays Ring oscillators Genetic Algorithm (GA) integrated circuit technology integrated circuit manufacture Transistor Device Component fabric Textile fabrics integrated circuit modelling Oscillators oscillation frequency Network routing

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