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Implementation of a sliding memory plane image processor

JOURNAL OF PARALLEL AND DISTRIBUTED COMPUTING 1998年第2期55卷 236-248页

作者： Ong, S Sunwoo, MH Ajou Univ Sch Elect & Elect Engn Suwon 442749 South Korea

This paper presents architectures and implementation of a Sliding Memory Plane (SliM) image Processor to build a SIMD parallel computer. The paper also proposes an enhanced multiplication algorithm to reduce the gate count and the number of cycles. The SliM chip consists of mesh-connected 5 x 5 PEs. Due to the idea of sliding, that is, overlapping the inter-PE communication time with the computation time, SliM can greatly reduce the inter-PE communication overhead. In addition, four operations corresponding to ALU, shift, delta I/O, and inter-PE communication can be grouped into an instruction to be executed in a cycle simultaneously. The implemented SliM chip operates at 25 MHz and gives 625 MIPS. Because of a mesh topology, a large number of chips can be easily connected to form a SIMD parallel computer. We have implemented the scalable SliM Array Processor and developed parallel algorithms for real-time image processing. (C) 1999 Academic Press.

关键词： real-time image processing computer architectures parallel architectures parallel algorithms mesh-connected SIMD array processor VLSI design

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A Practical Study of Intelligent image-Based Mobile Robot for Tracking Colored Objects

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Computers, Materials & Continua 2024年第8期80卷 2181-2197页

作者： Mofadal Alymani Mohamed Esmail Karar Hazem Ibrahim Shehata College of Computing and Information Technology Shaqra UniversityShaqra11961Saudi Arabia Faculty of Electronic Engineering Menoufia UniversityMenouf32952Egypt Faculty of Engineering Zagazig UniversityZagazig44519Egypt

Object tracking is one of the major tasks for mobile robots in many real-world ***,artificial intelligence and automatic control techniques play an important role in enhancing the performance of mobile robot *** contrast to previous simulation studies,this paper presents a new intelligent mobile robot for accomplishing multi-tasks by tracking red-green-blue(RGB)colored objects in a real experimental ***,a practical smart controller is developed based on adaptive fuzzy logic and custom proportional-integral-derivative(PID)schemes to achieve accurate tracking results,considering robot command delay and tolerance *** design of developed controllers implies some motion rules to mimic the knowledge of experienced *** scenarios of three colored object combinations have been successfully tested and evaluated by using the developed controlled image-based robot *** PID control failed to handle some tracking scenarios in this *** proposed adaptive fuzzy PID control achieved the best accurate results with the minimum average final error of 13.8 cm to reach the colored targets,while our designed custom PID control is efficient in saving both average time and traveling distance of 6.6 s and 14.3 cm,*** promising results demonstrate the feasibility of applying our developed image-based robotic system in a colored object-tracking environment to reduce human workloads.

关键词： Mobile robot autonomous systems fuzzy logic control real-time image processing

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Run-time self-reconfigurable 2D convolver for adaptive image processing

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MICROELECTRONICS JOURNAL 2011年第1期42卷 204-217页

作者： Fons, Francisco Fons, Mariano Canto, Enrique Univ Rovira & Virgili Dept Elect Elect & Automat Control Engn Tarragona 43007 Spain

Two-dimensional (20) convolution is a basic operation in digital signal processing, especially in image and video applications. Although its computation is conceptually simple, a sum of products of constants by variables, its implementation is highly demanding in terms of computational power, especially when addressed to real-time embedded systems. This work brings an innovative approach oriented to dynamically reconfigurable hardware. A flexible 2D convolver is deployed on a SRAM-based FPGA split in two parts: a static region and a partially reconfigurable region (PRR). Just to provide a universal solution, all the configurable aspects of the convolver (kernel dimensions, operands resolution, constant coefficients, pipeline stages, etc.) fit allocated in the PRR. In this way, the computer can self-adapt its structure on the fly, according to the characteristics of the image to be processed each time. Although there are many research articles in the literature encompassing the design of 20 convolution computers, to the best of the authors' knowledge, this is the first work that implements a 2D convolver based on run-time reconfigurable hardware, while other approaches synthesize it either directly in software or in hardware as fully static designs. This pioneer alternative exploiting key implementation aspects like parallelism, pipeline, flexibility and functional density overcomes both computational performance of software solutions and cost-effectiveness of static hardware designs, while delivering an outstanding level of adaptability. The balanced time-area trade-off achieved with this technology makes it appropriate for high-performance low-cost embedded systems. (C) 2010 Elsevier Ltd. All rights reserved.

关键词： FPGA 20 convolver Embedded system Run-time self-reconfiguration real-time image processing Parallel processing

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A FPGA-based parametrizable system for high-resolution frequency-domain image filtering

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JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS 2005年第5期14卷 895-921页

作者： Uzun, IS Amira, A Queens Univ Belfast Sch Elect Elect Engn & Comp Sci Belfast BT7 1NN Antrim North Ireland Queens Univ Belfast Inst Elect Commun & Informat Technol Belfast BT3 9DT Antrim North Ireland

Signal and image processing applications require high computational power with the ability to experiment different algorithms involving matrix transforms. Reconfigurable hardware devices in the form of Field Programmable Gate Arrays (FPGAs) have been proposed to obtain high performance at an economical price. However, the users must program FPGAs at a very low level and must have a detailed knowledge of the architecture of the device being used. In trying to reconcile the dual requirements of high performance and the ease of development, this paper reports the design and realization of the Fast Fourier Transforms (FFTs) using a FPGA-based environment, which enables system designer to meet different system requirements (i.e., chip area, speed, memory, etc.) for a range of signal processing and imaging applications. The use of the proposed environment has been proven by the developing a high-level FPGA-based parametrizable image processing system for frequency-domain filtering application. The system achieves real-time image filtering performance exceeding those of currently available solutions by an order of magnitude in frame rate and input image size.

关键词： fast Fourier transforms FPGAs image filtering real-time image processing

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The FPGA implementation of a one-bit-per-pixel image registration algorithm

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JOURNAL OF real-time image processing 2016年第4期11卷 799-815页

作者： An Hung Nguyen Pickering, Mark R. Lambert, Andrew ADFA UNSW Canberra UNSW Australia Canberra ACT Australia

The calculation of the motion observed between two images of the same scene is required for many applications such as video compression, panoramic stitching and optic flow algorithms for vehicle navigation. The particular application that we focus on in this paper is the need for small light-weight vehicles, such as unmanned ground or air vehicles, to sense their own motion for use in autonomous navigation algorithms. As the processing is ideally performed on-board these vehicles, there are severe restrictions on the processing environment available to perform the optic flow calculations. This has led to the development of FPGA solutions to calculate optic flow. However the most recent approaches still have extensive on-board memory requirements and make use of complex processing operations such as multiplication and matrix inversion. We present an FPGA implementation of a low complexity version of the Lucas-Kanade registration algorithm. This algorithm operates on one-bit images instead of the standard eight-bit approach and consequently can utilize simple logic operations such as exclusive-or rather than multiplications and also makes very efficient use of the available internal memory and resources.

关键词： image registration Optic flow Vision based navigation FPGA real-time image processing

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Coordinate Logic Order Statistics & Applications in image processing

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CIRCUITS SYSTEMS AND SIGNAL processing 2015年第3期34卷 901-929页

作者： Tsirikolias, Kostas D. Daedalus Ltd R&D Dept Athens 16675 Greece

A new approach regarding Low-Level image & Signal processing is presented. This new approach deals with the philosophy of finding a method for designing and executing algorithms (filters), using the least possible complexity. The proposed method is based on Coordinate Logic Order Statistics filters (CL-OS) which are an extension of Coordinate Logic Filters and introduces a minimalistic approach in filter design followed by an satisfactory efficiency in terms of quality, speed, complexity, and energy consumption. CL-OS filters have similar functionality with OS filters, specifically the basis of OS filters is the sorting of the original signal values while the basis of CL-OS filters is the sorting of the binary levels of the original signal values. The intrinsic feature of CL-OS filters is their explicit low overall complexity which is , on the other hand the general overall complexity of OS filters is;moreover, CL-OS filters are characterized by a naturally embedded parallelism which makes them absolutely appropriate for H/W implementation and real-time applications. Another characteristic property of CL-OS is that their field of definition includes the OS's field of definition causing an increase of the signal energy and thus constituting them not only smoothers but enhancers too. The last property is of great importance since it reveals new signal information giving a different interpretation of the original signal.

关键词： Coordinate logic filters Order statistics real-time image processing Median Non-linear image quantization

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Efficient Framework for real-time Color Cast Correction and Dehazing Using Online Algorithms to Approximate image Statistics

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IEEE ACCESS 2024年 12卷 72813-72827页

作者： Bilal, Muhammad Masud, Shahid Hanif, Muhammad Shehzad King Abdulaziz Univ Ctr Excellence Intelligent Engn Syst Jeddah 21589 Saudi Arabia King Abdulaziz Univ Fac Engn Dept Elect & Comp Engn Jeddah 21589 Saudi Arabia Lahore Univ Management Sci Dept Elect Engn Lahore 54792 Pakistan

image dehazing is a crucial task in the early stages of real-time image processing pipelines used in applications such as surveillance and advance driver assistance systems. Dehazing algorithms mitigate the spatially selective degradation of image details caused by natural phenomenon such as fog and sandstorms. The problem is exacerbated in the presence of color cast which can affect the color-sensitive processing in the downstream tasks. In order to correct these two aberrations, we have proposed a light-weight algorithm which is not only quantitively more effective than the state-of-the-art works but also uses minimal computational resources. Specifically, it has been proposed to tackle both aforementioned problems by processing luminance and chrominance channels separately through a custom resource-efficient colorspace transform. Moreover, it has been proposed to employ online calculation of the relevant video stream statistics to estimate the degradation model over several temporally adjacent frames. This approach not only reduces the hardware resource utilization when implemented inside the video processing pipeline but also reduces the flicker effect observed when frames are processed individually. It has been demonstrated through quantitative analysis on standard datasets that the proposed approach either works at par or better than the reference works in terms of image quality metrics. Furthermore, the proposed framework has been developed as a real-time video processing system on an FPGA platform. The synthesis results of this implementation suggest that the proposed framework achieves this performance using minimal logic resources.

关键词： image color analysis real-time systems Hardware Estimation Streaming media Task analysis Approximate computing Field programmable gate arrays image processing Algorithm design and analysis color cast correction dehazing FPGA high-level synthesis online algorithm real-time image processing

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Mapping semantic script with image processing algorithms to leverage amateur video material in professional production

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MULtimeDIA TOOLS AND APPLICATIONS 2013年第2期62卷 333-358页

作者： Diemert, Benjamin Pinzari, Ana Moulin, Claude Abel, Marie-Helene Shawky, Marcus M. Univ Technol Compiegne Ctr Rech Royallieu F-60205 Compiegne France

In this paper, we investigate the issue of amateur production in order to leverage its integration in professional production. We define a conceptual model of the shooting script that represents information about the shooting realization. It enables us to provides the amateur cameraman with prior shooting guidance on an intelligent camcorder. We use image processing algorithms and methods to provide the amateur with real-time shooting feedbacks. After the shooting, these algorithms produce more accurate descriptions that can be compared to the initial prescription. The comparison is guided by satisfaction rules defined by the professional to sort out non conforming sequence. Such rules are also used as query during video shot reviewing. Eventually, we discuss our approach with related works.

关键词： Amateur production Professional production chain Semantic script real-time image processing Intelligent camcorder

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Rapid pedobarographic image registration based on contour curvature and optimization

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JOURNAL OF BIOMECHANICS 2009年第15期42卷 2620-2623页

作者： Oliveira, Francisco P. M. Tavares, Joao Manuel R. S. Pataky, Todd C. Univ Porto Fac Engn Dept Engn Mecan P-4200465 Oporto Portugal Univ Porto Fac Engn P-4200465 Oporto Portugal Univ Liverpool Sch Biomed Sci HACB Liverpool L69 3GE Merseyside England

image registration, the process of optimally aligning homologous structures in multiple images, has recently been demonstrated to support automated pixel-level analysis of pedobarographic images and, subsequently, to extract unique and biomechanically relevant information from plantar pressure data. Recent registration methods have focused on robustness, with slow but globally powerful algorithms. In this paper, we present an alternative registration approach that affords both speed and accuracy, with the goal of making pedobarographic image registration more practical for near-real-time laboratory and clinical applications. The current algorithm first extracts centroid-based curvature trajectories from pressure image contours, and then optimally matches these curvature profiles using optimization based on dynamic programming. Special cases of disconnected images (that occur in high-arched subjects, for example) are dealt with by introducing an artificial spatially linear bridge between adjacent image clusters. Two registration algorithms were developed: a 'geometric' algorithm, which exclusively matched geometry, and a 'hybrid' algorithm, which performed subsequent pseudo-optimization. After testing the two algorithms on 30 control image pairs considered in a previous study, we found that, when compared with previously published results, the hybrid algorithm improved overlap ratio (p = 0.010), but both current algorithms had slightly higher mean-squared error, assumedly because they did not consider pixel intensity. Nonetheless, both algorithms greatly improved the computational efficiency (25 +/- 8 and 53 +/- 9ms per image pair for geometric and hybrid registrations, respectively). These results imply that registration-based pixel-level pressure image analyses can, eventually, be implemented for practical clinical purposes. (C) 2009 Elsevier Ltd. All rights reserved.

关键词： Plantar pressure measurement Human locomotion Dynamic programming real-time image processing Foot morphology

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image processing algorithm acceleration using reconfigurable macro processor model

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Journal of Systems Engineering and Electronics 2004年第2期15卷 110-114页

作者： SunGuanKfu ChenHuaming LuHuanzhang SchoolofElectronicScienceandEngineering NationalUniversityofDefenseTechnologyChangsha410073P.R.China

The concept and advantage of reconfigurable technology is introduced. A kind of processor architecture of re configurable macro processor (RMP) model based on FPGA array and DSP is put forward and has been implemented. Two image algorithms are developed: template-based automatic target recognition and zone labeling. One is estimating for motion direction in the infrared image background, another is line picking-up algorithm based on image zone labeling and phase grouping technique. It is a kind of 'hardware' function that can be called by the DSP in high-level algorithm. It is also a kind of hardware algorithm of the DSP. The results of experiments show the reconfigurable computing technology based on RMP is an ideal accelerating means to deal with the high-speed image processing tasks. High real time performance is obtained in our two applications on RMP.

关键词： real-time image processing reconfigurable computing technology reconfigurable macro processor model template matching image zone labeling.

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