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Conference on Visual Communications and Image Processing 2007

作者： Su, Li Lu, Yan Wu, Feng Li, Shipeng Gao, Wen Chinese Acad Sci Grad Sch Beijing 100080 Peoples R China Microsoft Res Asia Beijing 100080 Peoples R China

ISBN: (纸本)9780819466211

In this paper, we propose a joint power-distortion optimization scheme for real-time H.264 video encoding under the power constraint. Firstly, the power constraint is translated to the complexity constraint based on DVS technology. Secondly, a computation allocation model (CAM) with virtual buffers is proposed to facilitate the optimal allocation of constrained computational resource for each frame. Thirdly, the complexity adjustable encoder based on 'optimal motion estimation and mode decision is proposed to meet the allocated resource. The proposed scheme takes the advantage of some new features of H.264/AVC video coding tools such as early termination strategy in fast ME. Moreover, it can avoid suffering from the high overhead of the parametric power control algorithms and achieve fine complexity scalability in a wide range with stable rate-distortion performance. The proposed scheme also shows the potential of a further reduction of computation and power consumption in the decoding without any change on the existing decoders.

关键词： power constraint complexity scalability H.264/AVC real-time video coding

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Efficient coding and mapping algorithms for software-only real-time video coding at low bit rates

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR video TECHNOLOGY 2000年第6期10卷 843-856页

作者： Erol, B Kossentini, F Alnuweiri, H Univ British Columbia Vancouver BC V6T 1Z4 Canada

This paper presents efficient coding and mapping algorithms that lead to a significant speed improvement in low bit rate H.263/H263+ video encoding while maintaining high video-reproduction quality. First, by exploiting statistical properties of low resolution and slowly varying video sequences, we reduce significantly the computation times of the most computationally intensive components of video coding, particularly the discrete cosine transform, the inverse discrete cosine transform, quantization, and motion estimation. We also map some of the single instruction multiple fata (SIMD)-oriented functions onto Intel's MMX architecture. The developed algorithms are implemented using our public-domain H.263/H.263+ encoder/decoder software [1], Using the above algorithms, our H.263/H.263+ baseline video-encoder implementation can encode more than 15 fps in QCIF resolution on a Pentium MMX 200-MHz computer.

关键词： H.263 low bit rate video coding MMX real-time video coding

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Complexity control for real-time video coding

Complexity control for real-time video coding

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IEEE International Conference on Image Processing (ICIP 2007)

作者： Akyol, Emrah Mukherjee, Debargha Liu, Yuxin Univ Calif Los Angeles Los Angeles CA 90089 USA HP Labs Palo Alto CA USA

ISBN: (纸本)9781424414369

A methodology for complexity scalable video encoding and complexity control within the framework of the H.264/AVC video encoder is presented. To yield good rate-distortion performance under strict complexity/time constraints for instance in real-time communication, a framework for optimal complexity allocation at the macroblock level is necessary. We developed a macroblock level fast motion estimation based complexity scalable motion/mode search algorithm where the complexity is adapted jointly by parameters that determine the aggressiveness of. an early stop criteria, the number of ordered modes searched, and the accuracy of motion estimation steps for the INTER modes. Next, these complexity parameters are adapted per macroblock based on a control loop to approximately satisfy an encoding frame rate target. The optimal manner of adapting the parameters is derived from prior training. Results using the developed scalable complexity H.264/AVC encoder demonstrate the benefit of adaptive complexity allocation over uniform complexity scaling.

关键词： H.264/AVC complexity control scalable complexity real-time video coding videoconferencing fast motion estimation

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real-time distributed video coding for 1K-pixel visual sensor networks

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JOURNAL OF ELECTRONIC IMAGING 2016年第4期25卷 041008-041008页

作者： Hanca, Jan Deligiannis, Nikos Munteanu, Adrian Vrije Univ Brussel Dept Elect & Informat iMinds Pl Laan 2 B-1050 Brussels Belgium

Many applications in visual sensor networks (VSNs) demand the low-cost wireless transmission of video data. In this context, distributed video coding (DVC) has proven its potential to achieve state-of-the-art compression performance while maintaining low computational complexity of the encoder. Despite their proven capabilities, current DVC solutions overlook hardware constraints, and this renders them unsuitable for practical implementations. This paper introduces a DVC architecture that offers highly efficient wireless communication in real-world VSNs. The design takes into account the severe computational and memory constraints imposed by practical implementations on low-resolution visual sensors. We study performance-complexity trade-offs for feedback-channel removal, propose learning-based techniques for rate allocation, and investigate various simplifications of side information generation yielding real-time decoding. The proposed system is evaluated against H.264/AVC intra, Motion-JPEG, and our previously designed DVC prototype for low-resolution visual sensors. Extensive experimental results on various data show significant improvements in multiple configurations. The proposed encoder achieves real-time performance on a 1k-pixel visual sensor mote. real-time decoding is performed on a Raspberry Pi single-board computer or a low-end notebook PC. To the best of our knowledge, the proposed codec is the first practical DVC deployment on low-resolution VSNs. (C) 2016 SPIE and IS&T.

关键词： visual sensor networks distributed video coding Wyner-Ziv video coding low-resolution video real-time video coding

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The quantized DCT and its application to DCT-based video coding

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IEEE TRANSACTIONS ON IMAGE PROCESSING 2002年第3期11卷 177-187页

作者： Docef, A Kossentini, F Nguuyen-Phi, K Ismaeil, IR Univ British Columbia Signal Proc & Multimedia Grp Dept Elect & Comp Engn Vancouver BC V6T 1Z4 Canada

The two-dimensional (2-D) discrete cosine transform (DCT) and the subsequent quantization of the transform coefficients are two computationally demanding steps of any DCT-based video encoder. In this paper, we propose an efficient joint implementation of these two steps, where the precision in computing the DCT can be exchanged for a reduction in the computational complexity. First, the quantization is embedded in the DCT, thus eliminating the need to explicitly quantize the transform coefficients. A multiplierless integer implementation of the quantized DCT (QDCT) is then proposed that performs shift and add operations instead of full multiplications. A sequence of multiplierless QDCT algorithms is obtained with increasing precision and number of computations. Finally, further savings in computations are obtained by terminating the DCT computations whenever intermediate results indicate that the transform and quantization steps will likely result in a block of zero values. The proposed algorithms are applied to, and results are presented for, high-quality MPEG-2 and low bit rate H.263 video encoding.

关键词： discrete cosine transform (DCT) H.263 MPEG-2 quantization real-time video coding

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Adaptive rate control algorithm for low power video coding systems

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MULTIDIMENSIONAL SYSTEMS AND SIGNAL PROCESSING 2007年第1期18卷 5-15页

作者： Pan, F. Li, Z. G. Lim, K. P. Wu, D. J. Yu, R. S. ViXS Syst Inc Toronto ON M2J 1R3 Canada Inst Infocomm Res Singapore 119613 Singapore

With the recent development of third-generation communication technologies, low power video coding system (such as PDA, Handphone or system on chip) has found wide applications such as live video using a PDA and sharing it among friends, etc. However, video coding in a low power system has two major hurdles to overcome: (1) In a low power system, video coding needs to meet the rigorous constraints of the available memory and computational capacity;(2) In a low power system, the computational power allocated to video coding may vary drastically (in bursts). In this paper, a new adaptive rate control algorithm is proposed for low power video coding system. This adaptive rate control scheme takes into account the time constraint of a low power system, and its bit allocation depends not only on the available data bits, but more importantly, on the available coding time. Experimental results show that, compared to the existing rate control scheme, the new algorithm can always achieve the maximum frame rate, maximize the utilization of the available bandwidth and computing power, increase the average PSNR, and improve the subjective perceptual quality of the reconstructed video.

关键词： real-time video coding rate control low power system frame skipping

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COMPLEXITY-CONSTRAINED RATE-DISTORTION OPTIMIZATION FOR H.264/AVC video coding

COMPLEXITY-CONSTRAINED RATE-DISTORTION OPTIMIZATION FOR H.26...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： da Fonseca, Tiago A. de Queiroz, Ricardo L. Univ Brasilia Dept Elect Engn Brasilia DF Brazil

ISBN: (纸本)9781424494743

In order to enable real-time software-based video encoding, in this work we optimized the prediction stage of an H. 264 video encoder, in the complexity sense. Thus, besides looking for the coding options which lead to the best coded representation in terms of rate and distortion (RD), we constrain to a complexity (C) budget. We present a complexity optimized framework (RDC-optimized) which allows for real-time video compression and that does not make use of frame-skipping to comply to the desired encoding speed. We developed our framework around an open source software implementation of the H.264/AVC, the the x264 encoder. Results show that tight complexity control is attainable in practice, with very little loss in RD performance.

关键词： H.264 mode decision complexity scalability rate control real-time video coding

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Low-pass filtering of rate-distortion functions for quality smoothing in real-time video communication

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR video TECHNOLOGY 2005年第8期15卷 973-981页

作者： He, ZH Zeng, WJ Chen, CW Univ Missouri Dept Elect & Comp Engn Columbia MO 65211 USA Florida Inst Technol Dept Elect & Comp Engn Melbourne FL 32901 USA

In variable-bit-rate video coding, the video is preprocessed to collect sequence-level statistics, which are used for global bit allocation in the actual encoding stage to obtain a smoothed video presentation quality. However, in real-time video recording and network streaming, this type of two-pass encoding scheme is not allowed because the access to future frames and global statistics is not available. To address this issue, we introduce the concept of low-pass filtering of rate-distortion functions and develop a smoothed rate control (SRC) framework for real-time video recording and streaming. Theoretically, we prove that, using a geometric averaging filter, the SRC algorithm is able to maintain a smoothed video presentation quality while achieving the target bit rate automatically. We also analyze the buffer requirement of the SRC algorithm in real-time video streaming, and propose a scheme to seamlessly integrate robust buffer control into the SRC framework. The proposed SRC algorithm has very low computational complexity and implementation cost. Our extensive experimental results demonstrate that the SRC algorithm significantly reduces the picture quality variation in the encoded video clips.

关键词： bit allocation quality smoothing real-time video coding variable bit rate

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An early split and skip algorithm for fast intra CU selection in HEVC

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JOURNAL OF real-time IMAGE PROCESSING 2016年第2期12卷 273-283页

作者： Oztekin, Abdulkerim Ercelebi, Ergun Batman Univ Dept Elect Technol TR-72060 Batman Turkey Gaziantep Univ Dept Elect & Elect Engn TR-27310 Gaziantep Turkey

The rapid development and increase of multimedia applications, as well as the demand for higher video-quality services at restricted resources such as storage capacity, transmission bandwidth and power consumption, has brought the urgent need for more efficient video compression techniques. The new video coding standard high efficiency video coding (HEVC) has a significant superiority over its predecessor advanced video coding (AVC). HEVC is reported to halve the bit rate with the same visual quality, or a better quality with the same bit rate when compared with AVC. Beside other improvements, HEVC significantly gets its power from the use of dynamic hierarchical quad-tree structure by partitioning the frames into smaller regions called coding units (CU), by means of a rate-distortion optimization process. However, this improvement yields to a dramatic increase of high computational complexity and increased encoding time, which primarily restricts its adaptation in real-time applications. In this paper, we proposed an early CU determination algorithm for fast encoder realization to reduce the encoding time which is the most important part of the standard standing for development. The experimental results show that the proposed algorithm has approximately 45 % encoding time saving with a 4.6 % bit-rate increment, on average.

关键词： HEVC AVC RDO Fast encoder Early CU selection real-time video coding

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Complexity-Constrained H.264 video Encoding

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR video TECHNOLOGY 2009年第4期19卷 477-490页

作者： Su, Li Lu, Yan Wu, Feng Li, Shipeng Gao, Wen Chinese Acad Sci Grad Sch Beijing 100080 Peoples R China Microsoft Res Asia Beijing 100080 Peoples R China Peking Univ Sch Elect Engn & Comp Sci Beijing 100080 Peoples R China

In this paper, a joint complexity-distortion optimization approach is proposed for real-time H.264 video encoding under the power-constrained environment. The power consumption is first translated to the encoding computation costs measured by the number of scaled computation units consumed by basic operations. The solved problem is then specified to be the allocation and utilization of the computational resources. A computation allocation model (CAM) with virtual computation buffers is proposed to optimally allocate the computational resources to each video frame. In particular, the proposed CAM and the traditional hypothetical reference decoder model have the same temporal phase in operations. Further, to fully utilize the allocated computational resources, complexity-configurable motion estimation (CAME) and complexity-configurable mode decision (CAMD) algorithms are proposed for H.264 video encoding. In particular, the CAME is performed to select the path of motion search at the frame level, and the CAMD is performed to select the order of mode search at the macroblock level. Based on the hierarchical adjusting approach, the adaptive allocation of computational resources and the fine scalability of complexity control can be achieved.

关键词： Complexity control H.264/AVC power consumption real-time video coding

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