The circuit level incremental simulation is a good strategy to reduce the circuit simulation time, since most circuit designers use circuit simulators to simulate incrementally modified circuits repeatedly. This paper...
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The circuit level incremental simulation is a good strategy to reduce the circuit simulation time, since most circuit designers use circuit simulators to simulate incrementally modified circuits repeatedly. This paper researches the large-scale incremental circuit simulation using the well-known ITA(Iterated Timing Analysis) algorithm. The target circuits are popular MOSFET circuits containing interconnects that are modeled by transmission lines. This paper has proposed an efficient algorithm for incremental simulation, the method to handle transmission lines, and other time-saving techniques. Experimental results justify that proposed methods undertake large-scale incremental circuit simulation for MOSFET and transmission lines very well.
Transient sensitivity information is useful in many EDA tools such as circuit optimizers. In this paper,we investigate the transient sensitivity computations in large-scale MOSFET circuits. Iterated Timing Analysis (I...
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Transient sensitivity information is useful in many EDA tools such as circuit optimizers. In this paper,we investigate the transient sensitivity computations in large-scale MOSFET circuits. Iterated Timing Analysis (ITA) is used as the fundamental algorithm to undertake both timing and sensitivity simulations. A modified Direct Approach for sensitivity computation is proposed,which is called Adaptive Direct Approach that considers the number of design parameters and sizes of subcircuits. All proposed methods have been implemented and tested to justify their outstanding performance better than previous works.
Circuit level incremental simulation is an alternative strategy not only to reduce the circuit simulation time but also to maintain the simulation accuracy. This paper investigates the incremental simulation using the...
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Circuit level incremental simulation is an alternative strategy not only to reduce the circuit simulation time but also to maintain the simulation accuracy. This paper investigates the incremental simulation using the well-known ITA (Iterated Timing Analysis) algorithm for large-scale MOSFET circuits. The global design change has been considered. Also,a new incremental simulation strategy is presented. All proposed methods have been implemented and tested to justify their advantages.
In this paper, we first study the covergence performance of relaxatio-basedalgorithms for linear integral differential-algebraic equations (IDAEs), then a parallel decoupling technique to speed up the convergence of ...
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In this paper, we first study the covergence performance of relaxatio-basedalgorithms for linear integral differential-algebraic equations (IDAEs), then a parallel decoupling technique to speed up the convergence of the relaxation-based algorithms is derived. This novel technique is suitable for implementation of parallel processing for complicated systems of IDAEs. Factors taking effect on the performance of parallel processing are discussed in detail. Large numerical examples running on a network of IBM RS/6000 SP2 system are given to illustrate how judicious partitionings of matrices can help improve convergence in parallel processing.
High range resolution (HRR) moving target indicator radar is becoming increasingly important for many military and civilian applications involving the detection and classification of moving targets within a clutter ba...
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High range resolution (HRR) moving target indicator radar is becoming increasingly important for many military and civilian applications involving the detection and classification of moving targets within a clutter background. For ground-based HRR radar, when targets are moving slowly or near-broadside and the coherent processing interval or dwell time is not too long, the effects of range migration and range feature distortion can be ignored. based on this assumption, relaxation-based algorithms that are robust and computationally simple are proposed for HRR feature extraction of moving targets consisting of scatterers closely spaced in range in the presence of stationary clutter. Numerical examples show that the proposed algorithms exhibit super-resolution and excellent estimation performance.
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