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检索条件"主题词=replacement algorithm"

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A Penalty Aware Memory Allocation Scheme for Key-value Cache 44

A Penalty Aware Memory Allocation Scheme for Key-value Cache

引用

44th Annual International Conference on Parallel Processing Workshops (ICPPW)

作者： Ou, Jianqiang Patton, Marc Moore, Michael Devon Xu, Yuehai Jiang, Song Wayne State Univ ECE Dept Detroit MI 48202 USA

ISBN: (纸本)9781467375887

Key-value caches, represented by Memcached, play a critical role in data centers. Its efficacy can significantly impact users' perceived service time and back-end systems' workloads. A central issue in the in-memory cache's management is memory allocation, or how the limited space is distributed for storing key-value items of various sizes. When a cache is full, the allocation issue is how to conduct replacement operations on items of different sizes. To effectively address the issue, a practitioner must simultaneously consider three factors, which are access locality, item size, and miss penalty. Existing designs consider only one or two of the first two factors, and pay little attention on miss penalty. This inadequacy can substantially compromise utilization of cache space and request service time. In this paper we propose a Penalty Aware Memory Allocation scheme (PAMA) that takes all three factors into account. While the three different factors cannot be directly compared to each other in a quantitative manner, PAMA uses their impacts on service time to determine where a unit of memory space should be (de) allocated. The impacts are quantified as the decrease (or increase) of service time if a unit of space is allocated (or deallocated). PAMA efficiently tracks access pattern and use of memory, and speculatively evaluates the impacts to enable penalty-aware memory allocation for KV caches. Our evaluation with real-world Memcached workload traces demonstrates that PAMA can significantly reduce request service time compared to other representative KV cache management schemes.

关键词： Key-value Cache replacement algorithm Locality

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The Challenge of Eliminating Storage Bottlenecks in Distributed Systems

The Challenge of Eliminating Storage Bottlenecks in Distribu...

引用

1st International Workshop on Software Technologies for Future Dependable Distributed Systems

作者： Ueda, Takanori Hirate, Yu Yamana, Hayato Waseda Univ Tokyo 1698555 Japan

ISBN: (纸本)9781424435654

One of the most difficult problems in distributed systems is load-balancing. Even if we take care of load-balancing, heavily-loaded nodes often occur while there are still lightly-loaded nodes that have idle memory and idle CPU power. Our idea is to exploit this idle memory and idle CPU power to improve the storage performance of heavily-loaded nodes. Idle memory can be used for caching file data and idle CPU power can be used for extracting file access patterns from file access logs. File access patterns are valuable sources for optimizing a cache strategy. Our project goal is to improve the overall performance of distributed systems by improving storage access performance. This paper gives an overview of this project idea and reports the current status of the project. In addition, we show benchmark results from our prototype cache extension system, which is implemented in Linux Kernel 2.6. The DBT-3 (TPC-H) benchmark results show that our system can increase computer speed by a factor of 6.68.

关键词： Access pattern Access pattern mining Buffer caching Distributed systems replacement algorithm

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SLA: A Cache algorithm for SSD-SMR Storage System with Minimum RMWs 21st

SLA: A Cache Algorithm for SSD-SMR Storage System with Minim...

引用

21st International Conference on algorithms and Architectures for Parallel Processing (ICA3PP)

作者： Zheng, Xuda Zhang, Chi Duan, Keqiang Wu, Weiguo Yan, Jie Xi An Jiao Tong Univ Xian Peoples R China Hikvis Beijing Co Ltd Beijing Peoples R China

ISBN: (纸本)9783030953911;9783030953904

To satisfy the low-cost and massive data storage requirements imposed by data growth, Shingled Magnetic Recording (SMR) disks are extensively employed in the area of high-density storage. The primary drawback of SMR disks is the write amplification issue caused by sequential write constraints, which is becoming more prominent in the field of non-cold archives. Although a hybrid storage system comprised of Solid State Disks (SSDs) and SMRs may alleviate the aforementioned issue, current SSD cache replacement algorithms are still limited to the management method of Least Recently Used (LRU). The LRU queue, on the other hand, is ineffective in reducing the triggers of Read-Modify-Write (RMW), which is a critical factor for the performance of SMR disks. In this paper, we propose a new SMR Locality-Aware (SLA) algorithm based on a band-based management method. SLA adopts the Dual Locality Compare (DLC) strategy to solve the hit rate reduction problem caused by the traditional band-based management method, as well as the Relatively Clean Band First (RCBF) strategy to further minimize the number of RMW operations. Experiments indicate that, compared to the MSOT method, the SLA algorithm can maintain a similar hit rate as the LRU, while reducing the number of RMWs by 77.2% and the SMR disk write time by 95.1%.

关键词： Shingled Magnetic Recording replacement algorithm Hybrid storage system Spatial locality

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Smart Cache Insertion and Promotion Policy for Content Delivery Networks 23

Smart Cache Insertion and Promotion Policy for Content Deliv...

引用

52nd International Conference on Parallel Processing (ICPP)

作者： Wang, Peng Liu, Yu Zhao, Zhelong Zhou, Ke Huang, Zhihai Chen, Yanxiong Huazhong Univ Sci & Technol WNLO Wuhan Peoples R China Huazhong Univ Sci & Technol Wuhan Peoples R China Tencent Technol Shenzhen Co Ltd Shenzhen Peoples R China

ISBN: (纸本)9798400708435

Improving hit rates can be achieved by enhancing cache replacement algorithms with the identification of zero-reuse objects (ZROs) and inserting them at the end of the cache queue. Note that the promotion policy needs to achieve a similar task as the above insertion policy since the hit object may immediately become a ZRO (called P-ZRO) that is not suitable for placement at the front of the queue. However, existing studies have yet to consider P-ZROs, and current insertion algorithms struggle to simultaneously identify both ZROs and P-ZROs. To address these issues, we propose integrating the insertion and promotion policies. We do this by treating hit objects as special missing objects and employing reinforcement learning to create a unified model for both policies, where the learning function recognizes the relationship between performance changes and the emergence of ZROs and P-ZROs. Our proposed solution is a smart cache insertion and promotion policy (SCIP) that dynamically adjusts the insertion position using a bimodal insertion policy for both missing and hit objects, guided by the model. Extensive experiments demonstrate that SCIP significantly improves overall performance in real-world content delivery network systems and outperforms state-of-the-art insertion policies in terms of miss ratios in the simulator. In addition, deploying SCIP on optimal cache replacement algorithms can further decrease their miss ratios.

关键词： content delivery network replacement algorithm insertion policy

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Mobile web caching in a hostile environment

Mobile web caching in a hostile environment

引用

Conference on Battlespace Digitization and Network-Centric Systems III

作者： Kalbfleisch, G Movva, S Griffin, T Passos, NL Midwestern State Univ Dept Comp Sci Wichita Falls TX 76310 USA

ISBN: (纸本)081944961X

In the wired Internet, it is common practice to use Web caching to reduce network utilization and improve access time to a Web page. Mobile users introduce new variables in the communication process due to the fact that a user may dynamically change its contact point within the network, accessing the Web server through a different path, which may not have access to cached pages. In hostile environments such as domestic catastrophic emergencies, field units must have a higher priority to significant information available through Web servers, requiring lower response times and reliable access via Internet enabled cell phones. In foreign lands, specific infrastructure must be implemented and activated, which requires extensive work currently being researched by defense contractors. In domestic situations, the infrastructure exists and must be equipped to provide the necessary priority to civil defense personnel. This study discusses mechanisms used in Web caching and suggests features that should be added to current cache management algorithms to provide the necessary priority, including the use of standard protocol commands to identify cacheable information and establishment of priority and aging policies to control the length of time data should be maintained in the cache.

关键词： Quality-of-Service replacement algorithm emergency rescue cellular communication mobile access response time latency.

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A quantitative definition of locality of reference 13

A quantitative definition of locality of reference

引用

13th International Conference on Computers and their Applications

作者： Hosseini-Khayat, S GlobeSpan Semicond Inc Red Bank NJ 07701 USA

ISBN: (纸本)1880843234

In this paper, the concept of locality of reference and its connection to cache performance is explored. Seeking a quantitative definition of locality, we define a characteristic matrix for every request sequence. Then we prove that if two sequences have the same characteristic matrix, then they cause the same number of cache misses under a broad class of replacement algorithms.

关键词： locality replacement algorithm

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Dead Page and Dead Block Predictors: Cleaning TLBs and Caches Together 27

Dead Page and Dead Block Predictors: Cleaning TLBs and Cache...

引用

27th IEEE International Symposium on High-Performance Computer Architecture (HPCA)

作者： Mazumdar, Chandrashis Mitra, Prachatos Basu, Arkaprava Indian Inst Sci Dept Comp Sci & Automat Bengaluru Karnataka India

ISBN: (纸本)9781665422352

The last level TLB (LLT) and the last level cache (LLC) play a critical role in the overall performance of memory-intensive applications. While management of LLC content has received significant attention, the same may not be true for LLT. In this work, we first explore the well-known concept of dead blocks in caches for TLBs. We find that dead pages are fairly common in the LLT. Different from dead blocks in LLCs, dead pages in LLTs are most often dead-on-arrival, i.e., they produce zero hits in the TLB. We design a storage-efficient dead page predictor that works with a fraction of storage compared to typical dead block predictors. This is important since an LLT itself requires only a few KBs of storage compared to MBs in LLC. We then leverage the dead page information to guide a simple dead block predictor in LLC. This is driven by the observation that dead blocks are often concentrated within dead pages. In effect, we designed a dead page predictor and a correlating dead block predictor with a total storage overhead of only 11KB to bypass predicted dead pages and dead blocks in LLTs and LLCs, respectively. Together, these predictors help improve the IPC of a set of 14 memory-intensive workloads by 8.3%, on average.

关键词： TLB virtual memory last-level cache replacement algorithm

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2QW-Clock: An efficient SSD buffer management algorithm 22

2QW-Clock: An efficient SSD buffer management algorithm

引用

22nd International Conference on High Performance Computing

作者： He, Dan Wang, Fang Feng, Dan Liu, Jing Ning Wu, Yun Xiang Hu, Yang He, Ying Wuhan Natl Lab Optoelect Wuhan Peoples R China Huazhong Univ Sci & Technol Sch Comp Sci & Technol Wuhan Peoples R China Nanchang Hangkong Univ Sch Informat Engn Nanchang Peoples R China China Ship Dev & Design Ctr Wuhan Peoples R China

ISBN: (纸本)9781467384889

Modern solid state disk (SSD) has a buffer (SDRAM), which is used to store commonly used data and map in the near future. How to efficient management of this buffer is an important things of improving performance of SSD. Flash read and write speed have asymmetric characteristic. SSD buffer management algorithms must consider this characteristic of flash. Current page mapping SSD buffer management algorithms mainly use the Clean-First LRU (CFLRU) algorithm to first replace the clean buffer pages regardless of whether these pages will soon be used in the near future. At the same time, LRU buffer management algorithm of SSD does not consider file scanning. In order to solve these problems, we proposes a new SSD internal buffer management algorithm, called Two Queue Weight-Clock (2QW-Clock). This algorithm combines the advantages of 2Q and gives different weights to read page and write page to reflect the asymmetry of flash read and write speed. Therefore, it can get high write page hit ratios while maintaining high total page hit ratios. With the high write ratios, 2QW-Clock reduces the numbers of SSD write and erase operations. So it can greatly extend the life of the SSD. Conducting simulations with a variety of traces and a wide range of buffer sizes, we show that 2QW-Clock write hit ratios are significantly higher than CFLRU, LRU and 2Q in most cases while total hit ratios are almost as the 2Q. Simulation result shows that the numbers of 2QW-Clock write and erase counts reduced by up to 30% less than that of 2Q and CFLRU.

关键词： SSD flash replacement algorithm buffer management

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Design a hierarchical cache system for effective loss recovery in reliable multicast

引用

7th International Symposium on Advanced Parallel Processing Technologies

作者： Wang, Zhijun Fan, Xiaopeng Cao, Jiannong Hong Kong Polytech Univ Dept Comp Hong Kong Hong Kong Peoples R China

ISBN: (纸本)9783540768364

Packet loss recovery is a key issue in reliable multicast. An effective way for packet loss recovery is to place repair servers with active routers along the transmission paths. These repair servers naturally form a hierarchical cache system due to the hierarchical nature of the multicast tree. How to design an effective hierarchical cache system to minimize the packet loss is important. In this paper, we first derive a cooperative caching efficiency model for a hierarchical cache system. Based on the model, a heuristic Cooperative Cache replacement (CCR) algorithm is proposed to achieve efficient cache performance for reliable multicast systems. The implementation issues are also discussed in detail. The ns-2 based simulations are conducted to evaluate the performance of the proposed algorithm by compared to the optimal caching time (OCT) based algorithm. The results show that CCR effectively reduces the packet loss recovery latency.

关键词： reliable multicast loss recovery cooperative cache replacement algorithm

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Buffer Cache Management for Combined MLC and SLC Flash Memories Using both Volatile and Nonvolatile RAMs

Buffer Cache Management for Combined MLC and SLC Flash Memor...

引用

15th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications

作者： Park, Junseok Bahn, Hyokyung Koh, Kern Seoul Natl Univ Sch Engn & Comp Sci Seoul South Korea Ewha Womans Univ Dept Comp Sci Seoul South Korea

ISBN: (纸本)9780769537870

This paper presents a new buffer cache management scheme called DABC-NV for mixed MLC and SLC flash memories as the secondary storage and both byte-accessible NVRAM and conventional volatile RAM as their buffer caches. DABC-NV has four salient features. First, it allocates buffer cache space to MLC and SLC flash memories based on their I/O costs and then dynamically adjusts the allocated size according to the evolution of workloads. Second, it separately exploits read and write histories of block references, and thus it estimates future references of each operation more precisely. Third, it guarantees the complete consistency of write I/Os since all dirty data are cached in nonvolatile buffer caches. Fourth, metadata lists are maintained separately from cached blocks. This allows more efficient management of volatile and nonvolatile buffer caches based on read and write histories, respectively. Trace-driven simulations show that DABC-NV improves the I/O performance of embedded systems significantly. Specifically, it reduces I/O time by 24% on average compared to the CLOCK-NV algorithm.

关键词： replacement algorithm NVRAM NAND flash memory buffer caching MLC flash memory

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