The authors first propose an index mapping such that the type-IV in-dimensional discrete cosine transform (m-D DCT-IV) is turned into a sum involving a number of (m - 1)dimensional discrete cosine transforms ((m - 1)-...
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The authors first propose an index mapping such that the type-IV in-dimensional discrete cosine transform (m-D DCT-IV) is turned into a sum involving a number of (m - 1)dimensional discrete cosine transforms ((m - 1)-D DCTs). Then a polynomial transform is used for implementing the sum. Based on symmetrical properties, a refined fast polynomial transform algorithm is proposed for computing the polynomial transform. Compared to the row-column m-D DCT-IV algorithm, the proposed algorithm achieves remarkable savings in arithmetic operations. More precisely, the numbers of multiplications and additions for in-dimensional DCT-IV are nearly 1/m and (2m + 1)/3m times those of the row-column method, respectively.
The paper discusses a novel systolic implementation of the row-column method for solving the prime factor discrete Fourier transform (DFT) algorithm. It deals, in particular, with the two-factor decomposition where th...
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The paper discusses a novel systolic implementation of the row-column method for solving the prime factor discrete Fourier transform (DFT) algorithm. It deals, in particular, with the two-factor decomposition where the transform lengthNis an odd multiple of 4. By processing the four-point row-DFTs coefficient by coefficient, rather than DFT by DFT, as is conventionally done, it is seen how pipelined implementations of the row-DFT and column-DFT processes can be performed simultaneously, without need for matrix transposition of the row-DFT output, resulting in a fully pipelined concurrent solution. Hardware efficiency and simplicity is achieved via the computationally attractive Cordic (co-ordinate digital computer) arithmetic, withO(N) throughput requiring (asymptotically) one-quarter of the hardware requirements of establishedN-processor solutions.
作者：
Gong, DNHe, YTsing Hua Univ
Dept Elect Engn State Key Lab Microwave & Digital Commun Beijing 100084 Peoples R China
The two dimensional discrete cosine transform (2-D DCT) has been chosen as the basis in almost all of the recent international image and video coding standards. This paper first categorized the 2-D DCT and inverse DCT...
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ISBN:
(纸本)0819439886
The two dimensional discrete cosine transform (2-D DCT) has been chosen as the basis in almost all of the recent international image and video coding standards. This paper first categorized the 2-D DCT and inverse DCT (IDCT) architectures. Then a new VLSI architecture for 2-D DCT/IDCT without transpose memory was proposed. The proposed 2-D DCT/IDCT architecture eliminates special transpose circuits and uses general memory modules to store the intermediate results after row-wise transform. The row-wise and column-wise transforms are performed with the different data flow provided by the configurable computation units and data alignment module. The accuracy testing system is set up to search the optimum word-length parameters. Based on the accuracy testing system, the proposed architecture has achieved the smallest word-length compared with reported 2-D DCT architectures.
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