NAND flash memory has been widely used in storage systems by offering greater read/write performance and lower power consumption than mechanical hard drives. Recently, the tradeoff between endurance, write speed, and ...
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ISBN:
(纸本)9781467390552
NAND flash memory has been widely used in storage systems by offering greater read/write performance and lower power consumption than mechanical hard drives. Recently, the tradeoff between endurance, write speed, and read speed has been exploited from many ways for I/O performance improvement, which also induce the read/write latency variation. In this paper, the latency variation is exploited in I/O scheduling for access characteristic guided read and write latency minimization. First, with the understanding of the relationship among read latency, write latency and raw bit error rates (RBER), different ways to exploit the relationship for read and write latency reduction is discussed. Then, an I/O scheduling scheme is proposed by using hotness and retention age of accessed data to determine the speed of writes or reads, giving scheduling priority to fast writes and fast reads for conflict reduction. Experiments with various traces reveal that the proposed technique achieves significant read and write performance improvements.
Gate-level simulation with delay annotation is a both critical and time-consuming task in the circuit design flow. It is highly nontrivial to parallelize a simulation process, especially on designs with arbitrary gene...
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ISBN:
(纸本)9798350323481
Gate-level simulation with delay annotation is a both critical and time-consuming task in the circuit design flow. It is highly nontrivial to parallelize a simulation process, especially on designs with arbitrary general-purpose sequential elements such as latches, gated clocks, and scan chains. Current works on parallelizing gate-level simulation are fundamentally incompatible with these design elements and are highly reliant on circuit partitioning to achieve the best performance. In this paper, we propose a general-purpose gate-level simulation engine with partition-agnostic parallelism. We propose a general sequential behavior encoding technique and a fast event scheduling algorithm for general-purpose simulation tasks. Experimental results have shown up to 30x speed-up over commercial simulation engines.
Multiprocessor scheduling problems are hard because of the numerous constraints on valid schedules to take into account. This paper presents new schedule representations in order to overcome these difficulties, by all...
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ISBN:
(纸本)9780769531465
Multiprocessor scheduling problems are hard because of the numerous constraints on valid schedules to take into account. This paper presents new schedule representations in order to overcome these difficulties, by allowing processors to be fractionally allocated. We prove that these representations are equivalent to the standard representations when preemptive scheduling is allowed. This allows the creation of scheduling algorithms and the study of feasibility in the simpler representations. We apply this method throughout the paper. Then, we use it to provide new simple solutions to the previously solved implicit-deadline periodic scheduling problem. We also tackle the more general problem of scheduling arbitrary time-triggered tasks, and thus in particular solve the open multiprocessor general periodic tasks scheduling problem. Contrary to previous solutions like the PFair class of algorithms, the proposed solution also works when processors have different speeds. We complete the method by providing an online schedule transformation algorithm, that allows the efficient handling of both time-triggered and event-triggered tasks, as well as the creation of online rate-based scheduling algorithms on multiprocessors.
In this paper, we explore two novel scheduling algorithms which allow for both differentiated quality-of-service (QOS) and power conservation in input-queued packet switches. At their core is the idea of a backlog tar...
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ISBN:
(纸本)9781424420742
In this paper, we explore two novel scheduling algorithms which allow for both differentiated quality-of-service (QOS) and power conservation in input-queued packet switches. At their core is the idea of a backlog target which represents the delay sensitivity of each input/output port combination. The first algorithm, target-based projective cone scheduling (T-PCS), incorporates these targets into the well-studied projective cone scheduling algorithm, a generalized form of maximum weight matching (MWM). The second algorithm, average backlog scheduling (ABS), uses a 'memory window' to push average backlogs towards their targets. We explain the intuition behind each of these and then show, through simulation, that both exhibit high performance in terms of managing power and QOS, while simultaneously addressing these two key concerns in switches.
Deficit Round-Robin (DRR) is a widespread scheduling algorithm that provides fair queueing with variable-length packets. Bounds on worst-case delays obtained with DRR were found by Boyer et al. They used a rigorous ne...
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ISBN:
(纸本)9781665403863
Deficit Round-Robin (DRR) is a widespread scheduling algorithm that provides fair queueing with variable-length packets. Bounds on worst-case delays obtained with DRR were found by Boyer et al. They used a rigorous network calculus approach and characterized the service obtained by one flow of interest by means of a strict service curve. These bounds do not make any assumptions on the interfering traffic flows hence are pessimistic when the interfering traffic is constrained by some arrival curves. For such cases, Soni et al. improved the worst-case delay bounds by a correction term that accounts for arrival curve constraints of interfering traffic, using a semi-rigorous approach. Unfortunately, these latter bounds are incorrect, as we show by exhibiting a counter-example. Then we derive new service curves for DRR, which are rigorously proven, and we account for arrival curve constraints of interfering traffic. Hence, the resulting delay bounds are guaranteed to be correct. Furthermore, we find numerically that they are smaller than the incorrect ones obtained with the method of Soni et al. These bounds also improve on the results by Boyer et al. when there is no constraint on interfering traffic. Therefore, as of today, they are the best known delay bounds for DRR. Our results are obtained by applying the method of the pseudo-inverse.
A new dedicated resource allocation method for D2D communications in cellular systems employing fractional frequency reuse (FFR) is proposed in this paper. This method consists of three steps. For the first step, the ...
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ISBN:
(纸本)9781479973392
A new dedicated resource allocation method for D2D communications in cellular systems employing fractional frequency reuse (FFR) is proposed in this paper. This method consists of three steps. For the first step, the permitted frequency resource set of each D2D link is determined. For the second step, a frequency resource assignment algorithm is proposed which takes both interference and load into considerations. For the third step, a slot resource scheduling algorithm is proposed which relies on the maximum weight independent set algorithm in the graph theory. Simulation results show the efficiency of the proposed method.
In this paper, we investigate three-dimensional (3D) multi-user (MU) multiple-input multiple-output (MIMO) transmission for long term evolution advanced (LTE-A) downlink systems. We investigate some key techniques for...
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ISBN:
(纸本)9781467398145
In this paper, we investigate three-dimensional (3D) multi-user (MU) multiple-input multiple-output (MIMO) transmission for long term evolution advanced (LTE-A) downlink systems. We investigate some key techniques for 3D MU-MIMO to improve the performance of LTE-A systems, including rank and precoding matrix (PM) determination and user pairing. To reduce the complexity caused by a large number of co-scheduled users in 3D MU-MIMO, we develop a simplified and high efficient 3D MU-MIMO scheduling algorithm. The performance improvement of the proposed algorithm is demonstrated by system level simulation.
In this paper, we provide and study a general framework that allows the development of distributed mechanisms to achieve full utilization of multi-hop wireless networks. In particular, we describe a generic randomized...
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ISBN:
(纸本)9781424410460
In this paper, we provide and study a general framework that allows the development of distributed mechanisms to achieve full utilization of multi-hop wireless networks. In particular, we describe a generic randomized routing, scheduling and flow control scheme that is applicable to a large class of interference models, and that allows for the development of distributed algorithms which maximize network throughput and utilization. In particular, we focus on a specific interference model, namely the secondary interference model, and develop distributed algorithms with polynomial communication and computation complexity in the network size. This is an important result given that earlier throughput-optimal algorithms developed for such a model relies on the solution to an NP-hard problem. This results in a polynomial complexity cross-layer algorithm that achieves throughput optimality and fair allocation of network resources amongst the users. We further show that our algorithmic approach enables us to efficiently approximate the capacity region of a multi-hop wireless network.
Cloud computing is an internet-based pool of heterogeneous resources. The development of Cloud is scalable and reliable to make availability of resources when required to online users. Resources are provided as a serv...
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ISBN:
(纸本)9781509030385
Cloud computing is an internet-based pool of heterogeneous resources. The development of Cloud is scalable and reliable to make availability of resources when required to online users. Resources are provided as a service on demand with payment done on use basis. Nowadays, for less cost and maximize resource utilization, mainly computing is done on Cloud. Cloud simulator is a collection of java classes that provides simulation of concepts of cloud computing. Cloudlet scheduling is one of the most important task in cloud computing. This paper presents fundamental study on the functions of CloudSim simulator and provides tabulated view of various scheduling algorithms used in cloud environment with their parameters and results.
As technology scales, the delay uncertainty caused by process variations has become increasingly pronounced in deep submicron designs. As a result, a paradigm shift from deterministic to statistical design methodology...
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ISBN:
(纸本)9781424416936
As technology scales, the delay uncertainty caused by process variations has become increasingly pronounced in deep submicron designs. As a result, a paradigm shift from deterministic to statistical design methodology at all levels of the design hierarchy is inevitable [1]. As part of two NSF projects (NSF CNS CAREER 0643902 and NSF CNS 0720659), a variation-aware task allocation and scheduling method for Multiprocessor System-on-Chip (MPSoC) architectures is proposed, to mitigate the impact of parameter variations. A new design metric, called performance yield and defined as the probability of the assigned schedule meeting the predefined performance constraints, is used to guide the task allocation and scheduling procedure. An efficient yield computation method for task scheduling complements and significantly improves the effectiveness of the proposed variation-aware scheduling algorithm. Experimental results show that our variation-aware scheduler achieves significant yield improvements.
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