An automatic synthesis system for PLA based programmable hardware as part of a VLSI design system is presented. In order to reduce the needed silicon area of a PLA implementation we suggest algorithms for segmentation...
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An automatic synthesis system for PLA based programmable hardware as part of a VLSI design system is presented. In order to reduce the needed silicon area of a PLA implementation we suggest algorithms for segmentation, term minimization and PLA — folding. We present results of the implemented term minimization and PLA-folding procedures.
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