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soft-output sphere decoding:: Algorithms and VLSI implementation

IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS 2008年第2期26卷 290-300页

作者： Studer, Christoph Burg, Andreas Boelcskei, Helmut ETH Integrated Syst Lab CH-8092 Zurich Switzerland ETH Commun Technol Lab CH-8092 Zurich Switzerland

Multiple-input multiple-output (MIMO) detection algorithms providing soft information for a subsequent channel decoder pose significant implementation challenges due to their high computational complexity. In this paper, we show how sphere decoding can be used as an efficient tool to implement soft-output MIMO detection with flexible trade-offs between computational complexity and (error rate) performance. In particular, we provide VLSI implementation results which demonstrate that single tree-search, sorted QR-decomposition, channel matrix regularization, log-likelihood ratio clipping, and imposing runtime constraints are the key ingredients for realizing soft-output MIMO detectors with near max-log performance at a chip area that is only 58% higher than that of the best-known hard-output sphere decoder VLSI implementation.

关键词： multiple-input multiple-output (MIMO) communication systems soft-output sphere decoding VLSI implementation MIMO detection

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Parallel High Throughput soft-output sphere decoding Algorithm

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JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY 2012年第2期68卷 217-231页

作者： Qi, Qi Chakrabarti, Chaitali Arizona State Univ Sch Elect Comp & Energy Engn Tempe AZ 85287 USA

Multiple-Input-Multiple-output communication systems demand fast sphere decoding with high performance. To speed up the computation, we propose a scheme with multiple fixed complexity sphere decoders to construct a parallel soft-output fixed complexity sphere decoder (PFSD). The proposed decoder is highly parallel and has performance comparable to soft-output list fixed complexity sphere decoder (LFSD) and -best sphere decoder. In addition, we propose a parallel QR decomposition algorithm to lower the preprocessing overhead, and a low complexity LLR algorithm to allow parallel update of LLR values. We demonstrate that the PFSD algorithm can increase the throughput and reduce bit error rate of a soft-output solution in a 4 x 4 16-QAM system, and has superior performance compared to other soft decoders with comparable throughput and computation complexity. The PFSD algorithm has been mapped onto Xilinx XC4VLX160 FPGA. The resulting PFSD decoder can achieve up to 75 Mbps throughput for 4 x 4 64-QAM configuration at 100MHz with low control overhead.

关键词： soft-output sphere decoding Parallel algorithm Fixed complexity

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Exact Max-Log MAP soft-output sphere decoding via Approximate Schnorr-Euchner Enumeration

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IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY 2015年第6期64卷 2749-2753页

作者： Nikitopoulos, Konstantinos Karachalios, Athanasios Reisis, Dionysios Univ Surrey Innovat Ctr 5G Guildford GU2 7XH Surrey England Natl & Kapodistrian Univ Dept Phys Elect Lab Athens 10679 Greece

The complexity gains of sphere decoders (SDs) with Schnorr-Euchner enumeration and nonconstant amplitude constellations are limited by the required node ordering. Aiming at improving the implementation efficiency of SD without compromising optimality, this paper proposes a novel tree traversal for soft-output SDs providing the exact max-log MAP decoder performance. It consists of a predefined visiting order that approximates the exact Schnorr-Euchner enumeration (SEE) and a modified pruning metric that preserves the exact max-log MAP despite the approximate ordering. The proposed approach significantly improves both the computational complexity and the implementation cost of exact soft-output SDs compared with previous techniques. In particular, simulations show gains of 30%-56% in the required calculations for a 4x4 multiple-input multiple-output system with 16-quadrature amplitude modulation (QAM), and field-programmable gate array (FPGA) implementations show an average power reduction of 34%-50%.

关键词： MIMO detection multiple-input multiple-output (MIMO) communication systems soft-output sphere decoding

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Area- and Throughput-Optimized VLSI Architecture of sphere decoding

Area- and Throughput-Optimized VLSI Architecture of Sphere D...

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18th IEEE/IFIP International Conference on VLSI and System-on-Chip

作者： Wenk, Markus Bruderer, Lukas Burg, Andreas Studer, Christoph ETH Integrated Syst Lab CH-8092 Zurich Switzerland ETH Commun Technol Lab CH-8092 Zurich Switzerland

ISBN: (纸本)9781424464708

sphere decoding (SD) is a promising means for implementing high-performance data detection in multiple-input multiple-output (MIMO) wireless communication systems. In this paper, we focus on the register transfer level implementation of SD with minimum area-delay product for application in wideband MIMO communication systems, such as IEEE 802.11n, where multiple SD cores need to be instantiated. The basic architectural considerations and the proposed optimizations are explained based on hard-output SD, but are also applicable to soft-output SD. Corresponding VLSI implementation results (for both hard-output and soft-output SD) show an improvement in the area-delay product by almost 50% compared to that of other SD implementations reported in the literature.

关键词： IEEE 802.11 MIMO communication MIMO wireless communication systems VLSI area-optimized VLSI architecture decoding hard-output sphere decoding high-performance data detection minimum area-delay product multiple-input multiple-output systems register transfer level implementation soft-output sphere decoding throughput-optimized VLSI architecture

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Reduced Complexity soft-output MIMO sphere Detectors-Part II: Architectural Optimizations

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IEEE TRANSACTIONS ON SIGNAL PROCESSING 2014年第21期62卷 5521-5535页

作者： Mansour, Mohammad M. Alex, Sam P. Jalloul, Louay M. A. Amer Univ Beirut Dept Elect & Comp Engn Beirut Lebanon Broadcom Corp Sunnyvale CA 94086 USA

In Part I, we presented algorithmic optimizations for a soft-output (SO) tree-search MIMO detector targeted at reducing the node count complexity for a given error-rate performance. We present in this part the architecture for a hardware-efficient pipelined detector that incorporates all these optimizations. A detailed gate complexity analysis of the architecture is conducted, including arithmetic optimizations to minimize the use of multipliers for distance computations by exploiting the lattice structure, as well as efficient pointer logic for implementing child enumeration, internal node-pruning and node-skipping steps. For multitone OFDM symbol detection using multiple tree-search detectors, we propose an efficient scheduling scheme that exploits the slack in node count from tone-to-tone detection. By ordering the tones according to increasing order of their channel matrix orthogonality defect, the detector maximizes the slack of early terminating detectors and forwards it to ill-conditioned tones that require more detection time. Case studies and simulation experiments were conducted based on a 4-layer 64-QAM MIMO system for LTE. Simulations and VLSI synthesis results demonstrate that the proposed optimizations require a chip area of only 85 kGE to implement a 64-QAM SO MIMO detector for LTE capable of attaining almost ML performance with an SNR loss of only 0.85 dB.

关键词： Multiple-input multiple-output (MIMO) communication systems soft-output sphere decoding VLSI implementation MIMO detection

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Reduced Complexity soft-output MIMO sphere Detectors-Part I: Algorithmic Optimizations

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IEEE TRANSACTIONS ON SIGNAL PROCESSING 2014年第21期62卷 5505-5520页

作者： Mansour, Mohammad M. Alex, Sam P. Jalloul, Louay M. A. Amer Univ Beirut Dept Elect & Comp Engn Beirut 11072020 Lebanon Broadcom Corp Sunnyvale CA 94086 USA

Optimum soft-output (SO) multiple-input multiple-output (MIMO) tree-search detection algorithms pose significant implementation challenges due to their nondeterministic processing throughput and high computational complexity. In this two-part work, we present extensive algorithmic and architectural optimizations of the sphere-decoding algorithm targeted at achieving practical tradeoffs between desired link performance and affordable computational complexity. The algorithmic optimizations in this part span the tree-search traversal scheme, leaf processing step, internal node-pruning and skipping step, child enumeration based on a state-machine, adaptive radius scaling for LLR clipping, QR-decomposition based on minimum cumulative residuals, and multitree configurations. The optimizations demonstrate that a 64-QAM SO MIMO detector for LTE is capable of attaining almost ML performance with an SNR loss of only 0.85 dB at 1% BLER by visiting at most 200 tree nodes.

关键词： Multiple-input multiple-output (MIMO) communication systems soft-output sphere decoding VLSI implementation MIMO detection

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