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Restricted DCJ-indel model: sorting linear genomes with DCJ and indels

BMC BIOINFORMATICS 2012年第19期13卷 1-11页

作者： da Silva, Poly H. Machado, Raphael Dantas, Simone Braga, Marilia D. V. Univ Fed Fluminense IME Niteroi RJ Brazil Inmetro Inst Nacl Metrol Qualidade & Tecnol BR-25250020 Duque De Caxias Brazil

Background: The double-cut-and-join (DCJ) is a model that is able to efficiently sort a genome into another, generalizing the typical mutations (inversions, fusions, fissions, translocations) to which genomes are subject, but allowing the existence of circular chromosomes at the intermediate steps. In the general model many circular chromosomes can coexist in some intermediate step. However, when the compared genomes are linear, it is more plausible to use the so-called restricted DCJ model, in which we proceed the reincorporation of a circular chromosome immediately after its creation. These two consecutive DCJ operations, which create and reincorporate a circular chromosome, mimic a transposition or a block-interchange. When the compared genomes have the same content, it is known that the genomic distance for the restricted DCJ model is the same as the distance for the general model. If the genomes have unequal contents, in addition to DCJ it is necessary to consider indels, which are insertions and deletions of DNA segments. Linear time algorithms were proposed to compute the distance and to find a sorting scenario in a general, unrestricted DCJ-indel model that considers DCJ and indels. Results: In the present work we consider the restricted DCJ-indel model for sorting linear genomes with unequal contents. We allow DCJ operations and indels with the following constraint: if a circular chromosome is created by a DCJ, it has to be reincorporated in the next step (no other DCJ or indel can be applied between the creation and the reincorporation of a circular chromosome). We then develop a sorting algorithm and give a tight upper bound for the restricted DCJ-indel distance. Conclusions: We have given a tight upper bound for the restricted DCJ-indel distance. The question whether this bound can be reduced so that both the general and the restricted DCJ-indel distances are equal remains open.

关键词： Common Neighbor sorting algorithm Adjacency Graph Label Vertex Circular Chromosome

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Benefits of Physical Interaction with Array Elements and Code Consolidation on Student Comprehension of sorting algorithms 19

Benefits of Physical Interaction with Array Elements and Cod...

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Proceedings of the 50th ACM Technical Symposium on Computer Science Education

作者： Anisha Kaul Julia Ann Pinedo Anya Wallace Scripps College Claremont CA USA Harvey Mudd College Claremont CA USA

ISBN: (纸本)9781450358903

This study was a qualitative analysis of introductory-level computer science students' comprehension of sorting algorithms. We asked six students to read and summarize the code of a sorting algorithm. Next, we asked them to trace through the code, first using a provided array with pencil and paper, then again using sticky-notes to represent the array. Focused analysis of one interview found that a student who struggled to comprehend the algorithm during the pencil-and-paper trace quickly gained understanding when physically tracing the sticky-note array. We hypothesize that physical interaction with a sticky-note representation of an array facilitated student comprehension of sorting algorithms by consolidating multiple lines of code (LOC) into a single repeatable action. This research is relevant to computer science educators who may teach sorting algorithms to introductory-level students.

关键词： insertion sort introductory sorting algorithm undergraduate instruction bubble sort consolidation graphics/visualization

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sorting Using Complete Subintervals and the Maximum Number of Runs in a Randomly Evolving Sequence

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ANNALS OF COMBINATORICS 2009年第4期12卷 417-447页

作者： Janson, Svante Uppsala Univ Dept Math SE-75106 Uppsala Sweden

We study the space requirements of a sorting algorithm where only items that at the end will be adjacent are kept together. This is equivalent to the following combinatorial problem: Consider a string of fixed length n that starts as a string of 0's, and then evolves by changing each 0 to 1, with the n changes done in random order. What is the maximal number of runs of 1's? We give asymptotic results for the distribution and mean. It turns out that, as in many problems involving a maximum, the maximum is asymptotically normal, with fluctuations of order n (1/2), and to the first order well approximated by the number of runs at the instance when the expectation is maximized, in this case when half the elements have changed to 1;there is also a second order term of order n (1/3). We also treat some variations, including priority queues and sock-sorting. The proofs use methods originally developed for random graphs.

关键词： sorting algorithm runs priority queues sock-sorting evolution of random strings Brownian motion

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sorting IMPLICIT OUTPUTS IN DIGITAL SIMULATION

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IEEE TRANSACTIONS ON COMPUTERS 1970年第9期C 19卷 844-+页

作者： STEIN, ML MUNDSTOCK, EJ University of Minnesota

The Stein-Rose sorting algorithm for digital simulation is reexamined and reformulated in current terms. It is pointed out that the algorithm already contains within itself the means for the automatic detection of feedback loops (implicit outputs) in analog programs. The algorithm is then extended so that it can handle implicit outputs and the extended version is shown to be finite. Thus compilers for digital simulation languages utilizing the extended algorithm need not require that programmers take a priori action either to remove feedback loops from analog programs or to identify such loops to the compiler.

关键词： Analog Computer Program Compiler Digital Computer Program Digital Simulation Digital Simulation Language Feedback Implicit Output sorting algorithm

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Shift-Limited Sort: Optimizing sorting Performance on Skyrmion Memory-Based Systems

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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2020年第11期39卷 4115-4128页

作者： Hsieh, Yun-Shan Huang, Po-Chun Chen, Ping-Xiang Chang, Yuan-Hao Kang, Wang Yang, Ming-Chang Shih, Wei-Kuan Taipei Tech Dept Elect Engn Taipei 106 Taiwan Natl Tsing Hua Univ Hsinchu 300 Taiwan Natl Tsing Hua Univ Dept Comp Sci Hsinchu 300 Taiwan Acad Sinica Inst Informat Sci Taipei 11574 Taiwan Beihang Univ Fert Beijing Inst BDBC Beijing Peoples R China Beihang Univ Sch Microelect Beijing 100191 Peoples R China Chinese Univ Hong Kong Dept Comp Sci & Engn Hong Kong Peoples R China

Modern nonvolatile memories (NVMs) are widely recognized as energy-efficient replacements of classical memory/storage media, such as SRAM, DRAM, and mechanical hard disk. Among the popular NVMs, the skyrmion racetrack memory (SK-RM) is well known for its high storage density and unique supports of insert/delete operations. However, the existing algorithms designed for classical media might experience serious performance degradation when working on the SK-RM, due to the distinct characteristics of SK-RM. Thus, the existing algorithms should be redesigned to adapt to the brand-new memory model based on the SK-RM, so as to fully reveal the potentials of SK-RM. In particular, many existing algorithms tend to access the in-memory data in a random-hopping fashion, which generates many time-consuming shift operations of SK-RM. It is therefore crucial for the existing algorithms to eliminate unnecessary shift operations of SK-RM to boost the performance of the algorithms. In many modern applications, such as multimedia and data analysis, it is a common operation to process two or more arrays/vectors of data to perform certain computation tasks. In the arrays/vectors, an appropriate data placement strategy is critical for avoiding unnecessary shift operations of SK-RM. The observation thus motivates this work in proposing a recursive back-to-back data placement manner to effectively reduces the shift operations of SK-RM. To demonstrate the back-to-back data placement, we take sorting algorithms as a case study, and propose a novel shift-limited sorting algorithm for SK-RM. Analytical studies show that the shift-limited sort effectively enhances the time complexity of classical merge sort from O(dn lg n) to O(n lg n), where d is the bit distance between adjacent access ports on the nanotracks of the SK-RM. After that, the efficacy of the proposed shift-limited sort is then verified by experimental studies, where the results are encouraging.

关键词： Back-to-back data placement Skyrmion racetrack memory (SK-RM) sorting algorithm

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MemSort: In-Memory sorting Architecture 42

MemSort: In-Memory Sorting Architecture

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42nd International Conference on Computer Design

作者： Liu, Rui Zhang, Xiaoyu Wang, Xinyu Min, Feng Luo, Zhejian Chen, Xiaoming Han, Yinhe Tang, Minghua Xiangtan Univ Sch Mat Sci & Engn Xiangtan Peoples R China Chinese Acad Sci Inst Comp Technol Beijing Peoples R China Univ Chinese Acad Sci Beijing Peoples R China

ISBN: (纸本)9798350380415;9798350380408

sorting is one of the most fundamental operations in computer programming and used in countless algorithms. The performance of traditional von Neumann computers running sorting is limited by the bandwidth between memories and processors. Computing-in-memory (CiM) is a promising technology which has the potential to solve the "memory wall" bottleneck. CiM is suitable for data-intensive applications, and it is ideal for accelerating large-scale data sorting. In this paper, we propose a novel in-memory sorting accelerator, named MemSort, based on a proposed in-memory comparison array design based on emerging non-volatile devices. MemSort supports three sort operations including counting sort, merging sort, and the combination of counting sort and merging sort. We build a performance model for the combination sort which enables flexible allocation of resources under given constraints to meet the requirements of various applications for sorting. The evaluation results show that MemSort shows significant performance improvement and energy efficiency at both the system level and application level when processing large-scale data sorting. Compared with the CPU implementation, MemSort achieves energy savings of 19.69-72.75x and speedups of 24.48-38.58x with the same power constraint. MemSort's throughput is at least 4.86x higher than that of the recent FPGA-based sorting accelerator FANS. MemSort exhibits more than 11x throughput and 4.03x area efficiency, compared with the recent CiM-based sorting accelerator, RIME.

关键词： Computing-in-memory Non-volatile memory sorting algorithm

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Redesigning the sorting Engine for Persistent Memory 26th

Redesigning the Sorting Engine for Persistent Memory

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26th International Conference on Database Systems for Advanced Applications (DASFAA)

作者： Hua, Yifan Huang, Kaixin Zheng, Shengan Huang, Linpeng Shanghai Jiao Tong Univ Shanghai Peoples R China Tsinghua Univ Beijing Peoples R China

ISBN: (纸本)9783030731991;9783030732004

Emerging persistent memory (PM, also termed as nonvolatile memory) technologies can promise large capacity, non-volatility, byte-addressability and DRAM-comparable access latency. Such amazing features have inspired a host of PM-based storage systems and applications that store and access data directly in PM. sorting is an important function for many systems, but how to optimize sorting for PM-based systems has not been systematically studied yet. In this paper, we conduct extensive experiments for many existing sorting methods, including both conventional sorting algorithms adapted for PM and recently-proposed PM-friendly sorting techniques, on a real PM platform. The results indicate that these sorting methods all have drawbacks for various workloads. Some of the results are even counterintuitive compared to running on a DRAM-simulated platform in their papers. To the best of our knowledge, we are the first to perform a systematic study on the sorting issue for persistent memory. Based on our study, we propose an adaptive sorting engine, namely SmartSort, to optimize the sorting performance for different conditions. The experimental results demonstrate that SmartSort remarkably outperforms existing sorting methods in a variety of cases.

关键词： Persistent memory sorting algorithm Pointer-indirect Wear-leveling

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High-performance genome sorting program 10

High-performance genome sorting program

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10th International Young Scientists Conference in Computational Science (YSC)

作者： Kasilov, Vasily Drobintsev, Pavel Voinov, Nikita Peter Great St Petersburg Polytech Univ Polytech Skaya 29 St Petersburg 195251 Russia

This paper is devoted to the practical application of parallel sorting algorithms and parallel input-output methods for the problem of genome alignment. The paper considers different approaches to the implementation of such algorithms, taking into account the capabilities of high-performance systems. Main purpose of the work is to develop a genome sorting program, the efficiency of which significantly exceeds the efficiency of free software analogues. The genome sorting program is implemented for a supercomputer using the C++ language and the OpenMP and OpenMPI. The developed program demonstrates a significant increase in the speed of operation (up to 10 times) compared to free software analogues due to massive parallel data input and output. Different approaches for data input/output parallelization and data processing considered in the paper can be applied in other subject areas. (C) 2021 The Authors. Published by Elsevier B.V.

关键词： genome sorting algorithm alignment BAM and SAM files OpenMP HPC

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Induced sorting Suffixes in External Memory with Better Design and Less Space 1

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22nd International Symposium on String Processing and Information Retrieval (SPIRE)

作者： Liu, Wei Jun Nong, Ge Chan, Wai Hong Wu, Yi Sun Yat Sen Univ Guangzhou 510275 Guangdong Peoples R China Gannan Normal Univ Ganzhou Peoples R China SYSU CMU Shunde Int Joint Res Inst Guangzhou Guangdong Peoples R China Hong Kong Inst Educ Tai Po Hong Kong Peoples R China

ISBN: (数字)9783319238265

ISBN: (纸本)9783319238265;9783319238258

Recently, several attempts have been made to extend the internal memory suffix array (SA) construction algorithm SA-IS to the external memory model, e.g., eSAIS, EM-SA-DS and DSA-IS. While the developed programs for these algorithms achieve remarkable performance in terms of I/O complexity and speed, their designs are quite complex and their disk requirements remain rather heavy. Currently, the core algorithmic part of each of these programs consists of thousands of lines in C++, and the average peak disk requirement is over 20n bytes for an input string of size n < 2(40). We re-investigate the problem of induced sorting suffixes in external memory and propose a new algorithm SAIS-PQ (SAIS with Priority Queue) and its enhanced alternative SAIS-PQ+. Using the library STXXL, the core algorithmic parts of SAIS-PQ and SAIS-PQ+ are coded in around 800 and 1600 lines in C++, respectively. The time and space performance of these two programs are evaluated in comparison with eSAIS that is also implemented using STXXL. In our experiment, eSAIS runs the fastest for the input strings not larger than 16 GiB, but it is slower than SAIS-PQ+ for the only two input strings of 32 and 48.44 GiB. For the average peak disk requirements, eSAIS and SAIS-PQ+ are around 23n and 15n bytes, respectively.

关键词： Suffix array sorting algorithm External memory

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Capacitor Balancing Controller Voltage sorting Statistics in Modular Multilevel Converters

Capacitor Balancing Controller Voltage Sorting Statistics in...

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IEEE Southern Power Electronics Conference (SPEC)

作者： Heath, Theodor Green, Peter R. Barnes, Mike Coventry, Paul Univ Manchester Sch Elect & Elect Engn Manchester Lancs England Natl Grid Warwick England

ISBN: (纸本)9781509064267;9781509064250

Modular multilevel converters (MMCs) are made up of many submodules (SMs) connected in series. In order to avoid semiconductor over-voltages, SM capacitors should be kept within strict voltage limits. The capacitor balancing controller (CBC) is used to sort SM capacitor voltages prior to modulation. This paper investigates the variation in sorting complexity at steady state and transient conditions for a brute-force and past-position methodology based on the bubble sort algorithm. A focus is placed on the potential for 'worst-case' sorting, requiring increased computational effort. This paper forms part of ongoing research to analyze the hardware constraints on MMCs with very large numbers of SMs. Simulation results based on a PSCAD/EMTDC detailed equivalent model are used for analysis and conclusions.

关键词： Modular Multilevel Converter Nearest Level Control Capacitor Balancing Control sorting algorithm

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