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An All Binary Sub-pixel Motion Estimation Approach and its Hardware Architecture

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS 2008年第4期54卷 1928-1937页

作者： Celebi, Anil Akbulut, Orhan Urhan, Oguzhan Hamzaoglu, Ilker Ertuerk, Sarp Kocaeli Univ KULIS Dept Elect & Telecommun Engn TR-41040 Kocaeli Turkey Sabanci Univ Fac Engn & Nat Sci TR-34956 Istanbul Turkey

Motion estimation (ME) is the most computationally intensive part of a video coding system. Therefore it is very important to reduce its computational complexity. In this paper, a novel all-binary approach for reducing the computational complexity of sub-pixel accurate ME is proposed. An efficient hardware architecture for the proposed all-binary;sub-pixel accurate motion estimation approach is also presented. The proposed hardware architecture has significantly low hardware complexity and therefore very low power consumption. It can process 720p video frames at 30 fps in a pipelined fashion together with the integer ME hardware. Therefore, it can be used in real-time low power video coding systems required by many mobile consumer electronics devices.

关键词： Video Coding One-bit transform Sub-pixel motion estimation source pixel based linear arrays

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Efficient Hardware Implementations of Low Bit Depth Motion Estimation Algorithms

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IEEE SIGNAL PROCESSING LETTERS 2009年第6期16卷 513-516页

作者： Celebi, Anil Urhan, Oguzhan Hamzaoglu, Ilker Erturk, Sarp Kocaeli Univ Dept Elect & Telecommun Engn Kocaeli Univ Lab Image & Signal Proc TR-41040 Kocaeli Turkey Sabanci Univ Fac Engn & Nat Sci TR-34956 Istanbul Turkey

In this paper, we present efficient hardware implementation of multiplication free one-bit transform (MF1BT) based and constraint one-bit transform (C-1BT) based motion estimation (ME) algorithms, in order to provide low bit-depth representation based full search block ME hardware for real-time video encoding. We used a source pixel based linear array (SPBLA) hardware architecture for low bit depth ME for the first time in the literature. The proposed SPBLA based implementation results in a genuine data flow scheme which significantly reduces the number of data reads from the current block memory, which in turn reduces the power consumption by at least 50% compared to conventional 1BT based ME hardware architecture presented in the literature. Because of the binary nature of low bit-depth ME algorithms, their hardware architectures are more efficient than existing 8 bits/pixel representation based ME architectures.

关键词： Low bit-depth motion estimation motion estimation hardware source pixel based linear arrays

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