In our previous work, we have proposed the extended Karnaugh map representation (EKMR) scheme for multidimensional array representation. In this paper, we propose two data compression schemes, EKMR Compressed Row/Colu...
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In our previous work, we have proposed the extended Karnaugh map representation (EKMR) scheme for multidimensional array representation. In this paper, we propose two data compression schemes, EKMR Compressed Row/Column Storage (ECRS/ECCS), for multidimensional sparsearrays based on the EKMR scheme. To evaluate the proposed schemes, we compare them to the CRS/CCS schemes. Both theoretical analysis and experimental tests were conducted. In the theoretical analysis, we analyze the CRS/CCS and the ECRS/ECCS schemes in terms of the time complexity, the space complexity, and the range of their usability for practical applications: In experimental tests, we compare the compressing time of sparsearrays and the execution time of matrix-matrix addition and matrix-matrix multiplication based on the CRS/CCS and the ECRS/ECCS schemes. The theoretical analysis and experimental results show that the ECRS/ECCS schemes are superior to the CRS/CCS schemes for all the evaluated criteria, except the space complexity in some cases.
arrayoperations are useful in a lot of scientific codes. In recent years, several applications, such as the geological analysis and the medical images processing, are processed using arrayoperations for three-dimens...
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arrayoperations are useful in a lot of scientific codes. In recent years, several applications, such as the geological analysis and the medical images processing, are processed using arrayoperations for three-dimensional (abbreviate to "3D") sparsearrays. Due to the huge computation time, it is necessary to compress 3D sparsearrays and use parallel computing technologies to speed up sparse array operations. How to compress the sparsearrays efficiently is an important task for practical applications. Hence, in this paper, two strategies, inter- and intra-task parallelization (abbreviate to "ETP" and "RTP"), are presented to compress 3D sparsearrays, respectively. Each strategy was designed and implemented on Intel Xeon and Xeon Phi, respectively. From experimental results, the ETP strategy achieves 17.5 and 18.2 speedup ratios based on Intel Xeon E5-2670 v2 and Intel Xeon Phi SE10X, respectively;4.5 and 4.5 speedup ratios for the RTP strategy based on these two environments, respectively.
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