The eight-bit stack processor architecture is proposed, which is designed for the FPGA implementation. The microprocessor with this architecture has small hardware costs, reduced software amount, and ability to add up...
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ISBN:
(纸本)9781728120652
The eight-bit stack processor architecture is proposed, which is designed for the FPGA implementation. The microprocessor with this architecture has small hardware costs, reduced software amount, and ability to add up to hundred new user instructions to its instruction set. The microprocessor architecture is adapted for programming the serial port communications and is able to perform the data stream parsing. It is effectively used for the Internet of Things applications.
Nowadays, electronic systems are becoming increasingly attractive for many applications. Such systems should be more and more dependable and require the evaluation and the improvement of their dependability parameters...
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ISBN:
(纸本)9781424415762
Nowadays, electronic systems are becoming increasingly attractive for many applications. Such systems should be more and more dependable and require the evaluation and the improvement of their dependability parameters. In the continuity of the CETIM project [1], the principal objective is to define an integrated design of dependable mechatronic systems. In addition, the presence of programmable electronics imposes the existence of hardware/software interactions for the evaluation of dependability parameters. In this work we apply the informational flow approach [2] to evaluate some dependability parameters of a stack processor architecture in order to make adjustment during the co-design step. A VHDL-RTL modeling of the processor instruction set is done in order to carry on the information flow modeling. The probability of existence on different functional mode is estimated and discussed for 2 instructions. The first study concerns the instruction models without taking into account a fault-tolerant method. The second study concerns the same models but with taking into account this fault-tolerant method.
The basic structure and features of a 16-bit real time stack processor is *** design and implementation method of the 16-bit stack processor is presented in the *** behavioral description and state machine description...
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ISBN:
(纸本)0780392108
The basic structure and features of a 16-bit real time stack processor is *** design and implementation method of the 16-bit stack processor is presented in the *** behavioral description and state machine description is applied to program design using *** 16-bit real time stack processor implemented by Spartan-ⅡXC2S200 FPGA chip,and is successfully adopted in frequency spectrum controller system of MRI.
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