检索结果-内蒙古大学图书馆

Preamble-less nondecision-aided (NDA) feedforward synchronization techniques for 16-QAM TDMA demodulators

IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY 1998年第2期47卷 673-685页

作者： Efstathiou, D Aghvami, AH Analog Devices Inc Commun Div Greensboro NC 27409 USA Univ London Kings Coll Dept Elect & Elect Engn Commun Res Grp London WC2R 2LS England

In this paper, the performance of fully digital synchronization techniques for time-division multiple-access (TDMA) differentially encoded 16-QAM signal transmission, over cellular mobile radio channels, is considered. The preamble-less feedforward nondecision-aided (FF-NDA) synchronization techniques used for symbol timing recovery, carrier phase recovery and amplitude gain control to overcome Rayleigh faded channel impairments, are described. Novel techniques for digital amplitude gain estimation are presented. The performance of the synchronization parameters' estimators at the receiver is evaluated by computer simulation over additive white Gaussian noise (AWGN) and slow Rayleigh fading environment. Statistical properties of the algorithms developed are evaluated in terms of the bias and variance of the estimated errors and are compared to the Cramer-Rao lower bound.

关键词： preambleless techniques symbol timing recovery synchronization techniques TDMA transmission

来源：评论

学校读者我要写书评

暂无评论

Optimized synchronization Technique for Single Phase Grid-connected Converters 17

Optimized Synchronization Technique for Single Phase Grid-co...

引用

17th International Multi-Conference on Systems, Signals and Devices (SSD)

作者： Abbes, Mohamed Chebbi, Souad Univ Tunis Natl Super Sch Engineers Tunis ENSIT Lab Technol Informat Commun & Elect Engn LaTICE Tunis 1008 Tunisia

ISBN: (纸本)9781728110806

The performances of the synchronization unit have become a crucial issue in applications involving grid-connected power *** view of the topologies of modern power systems, control algorithm of Distributed Generation (DG) sources are required to respond effectively to grid faults in order to support and enhance the stability of the grid. Thus, improving the accuracy and the robustness of the synchronization method during normal or distorted conditions is important to fulfill these requirements. The objective of this paper is to improve the performances of a Phase-Locked Loop (PLL) through an optimized tuning of the PI controller. This synchronization technique is based on a second order generalized integrator and it is intended for single-phase Photovoltaic (PV) systems. Its performances are evaluated by simulating its behavior during grid faults. An experimental prototype is developed to validate the operation of the synchronization unit when connected to the single-phase grid.

关键词： Distributed generation synchronization techniques Phase Locked Loop Adaptive filtering Robust control

来源：评论

学校读者我要写书评

暂无评论

Memory Tagging: Minimalist synchronization for Scalable Concurrent Data Structures 20

Memory Tagging: Minimalist Synchronization for Scalable Conc...

引用

32nd ACM Symposium on Parallelism in Algorithms and Architectures (SPAA)

作者： Alistarh, Dan Brown, Trevor Singhal, Nandini IST Austria Klosterneuburg Austria Univ Waterloo Waterloo ON Canada Microsoft R&D India New Delhi India

ISBN: (纸本)9781450369350

There has been a significant amount of research on hardware and software support for efficient concurrent data structures;yet, the question of how to build correct, simple, and scalable data structures has not yet been definitively settled. In this paper, we revisit this question from a minimalist perspective, and ask: what is the smallest amount of synchronization required for correct and efficient concurrent search data structures, and how could this minimal synchronization support be provided in hardware? To address these questions, we introduce memory tagging, a simple hardware mechanism which enables the programmer to "tag" a dynamic set of memory locations, at cache-line granularity, and later validate whether the memory has been concurrently modified, with the possibility of updating one of the underlying locations atomically if validation succeeds. We provide several examples showing that this mechanism can enable fast and arguably simple concurrent data structure designs, such as lists, binary search trees, balanced search trees, range queries, and Software Transactional Memory (STM) implementations. We provide an implementation of memory tags in the Graphite multi-core simulator, showing that the mechanism can be implemented entirely at the level of L1 cache, and that it can enable non-trivial speedups versus existing implementations of the above data structures.

关键词： concurrent data structures synchronization techniques transactional memory search data structures hardware mechanisms

来源：评论

学校读者我要写书评

暂无评论

Hybrid Petri nets in conceptual schema of dual-motor vehicle synchronization

Hybrid Petri nets in conceptual schema of dual-motor vehicle...

引用

IEEE Vehicle Power and Propulsion Conference (VPPC)

作者： Letchmanan, R. Economou, J. T. Tsourdos, A. White, B. A. Cranfield Univ DCMT Dept Aerosp Power & Sensors Swindon SN6 8LA Wilts England

ISBN: (纸本)9781424401581

Motion generated components such as the driving and steering electric motors play a crucial role in the success and failure of any land vehicle mobility. For the driving motors, in-wheel hub adaptation has been widely favoured to replace traditional axle-driven vehicles. Additional steering motors are being coupled to combine two parallel drivelines to provide the extra degree of freedom movement per wheel. The implementation of multi-motor strategy would lead to an increase in vehicle part counts. This conceptual paper proposes a Petri net (PN) modelling approach to dual-motor framework of 4x4 vehicles consisting of an embedment instance of six propelled motors. Each preferred motor are accompanied by a three-phase inverter drive which is regarded as a discrete-event system. The motor drives are represented in the form of matrix depiction through event-driven nets and are paired with motors modelled via general stochastic nets. The dual-motor net framework with four-quadrant drive exemplifies motoring and regeneration operations and is used to investigate synchronization and asynchronization activities. The use of Petri net is seen as the de-facto standard methodology which supports modelling of vehicle structure and functional behaviour of multi-motor systems based on situations involving complex logical interactions of synchronization-related activities. Such modelling is intended to assist the multi-facet land vehicle in its complex initial system development. The main benefit of multiple PN motor drive characterization is that it provides insight about the properties and problems of the overall vehicle system prior to implementation. This allows many functional issues about the multi-facet land vehicle system to be resolved in the requirements and design phase rather than in the implementation phase. The construction of dual PN motor network are also intended for future extension to multiple motor net vehicle framework and use as fault models to improve the ove

关键词： Petri nets logical-interactions three-phase drive synchronization techniques vehicle verification dependability-analysis

来源：评论

学校读者我要写书评

暂无评论

Revisiting the Combining synchronization Technique 12

Revisiting the Combining Synchronization Technique

引用

17th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming

作者： Fatourou, Panagiota Kallimanis, Nikolas D. Univ Crete Dept Comp Sci Iraklion Greece Univ Ioannina Dept Comp Sci GR-45110 Ioannina Greece

ISBN: (纸本)9781450311601

Fine-grain thread synchronization has been proved, in several cases, to be outperformed by efficient implementations of the combining technique where a single thread, called the combiner, holding a coarse-grain lock, serves, in addition to its own synchronization request, active requests announced by other threads while they are waiting by performing some form of spinning. Efficient implementations of this technique significantly reduce the cost of synchronization, so in many cases they exhibit much better performance than the most efficient finely synchronized algorithms. In this paper, we revisit the combining technique with the goal to discover where its real performance power resides and whether or how ensuring some desired properties (e.g., fairness in serving requests) would impact performance. We do so by presenting two new implementations of this technique;the first (CC-Synch) addresses systems that support coherent caches, where as the second (DSM-Synch) works better in cacheless NUMA machines. In comparison to previous such implementations, the new implementations (1) provide bounds on the number of remote memory references (RMRs) that they perform, (2) support a stronger notion of fairness, and (3) use simpler and less basic primitives than previous approaches. In all our experiments, the new implementations out perform by far all previous state-of-the-art combining-based and fine-grain synchronization algorithms. Our experimental analysis sheds light to the questions we aimed to answer. Several modern multi-core systems organize the cores into clusters and provide fast communication within the same cluster and much slower communication across clusters. We present an hierarchical version of CC-Synch, called H-Synch which exploits the hierarchical communication nature of such systems to achieve better performance. Experiments show that H-Synch significantly outpperforms previous state-of-the-art hierarchical approaches. We provide new implementations of co

关键词： Algorithms Experimentation Theory Performance synchronization techniques combining hierarchical algorithms blocking algorithms concurrent data structures

来源：评论

学校读者我要写书评

暂无评论

An Optimal Frame synchronization Technique Using an Associative Processor

引用

IEEE Transactions on Computers 1977年第2期C-26卷 170-174页

作者： Saxton, Terrence L. Huang, Cheng-Chi Systems and Research Center Honeywell. Inc. Minneapolis MN 55413 United States

Data loss resulting from the time to regain frame synchronization following detection of an out-of-frame condition on a synchronous time-division multiplexed bus or line, such as the Bell System T1 digital line, can be substantial. Most current sequential schemes require many frame times to separate with high probability the true frame pattern from identical patterns occurring temporarily in random data. A parallel search technique and a special purpose associative processor implementation which can eliminate loss of frame synchronization due to frame pattern bit errors and reduce frame synchronization time to its minimum value by eliminating the time spent dwelling at false frame positions is presented. Copyright © 1977 by The Institute of Electrical and Electronics Engineers, Inc.

关键词： Associative memory (AM) associative processor content-addressed memory (CAM) framing strategies multiple match resolver parallel processor synchronization techniques

来源：评论

学校读者我要写书评

暂无评论

Efficient algorithm for transferring a real-time HEVC stream with haptic data through the internet

引用

JOURNAL OF REAL-TIME IMAGE PROCESSING 2016年第2期12卷 343-355页

作者： Kokkonis, George Psannis, Kostas E. Roumeliotis, Manos Ishibashi, Yutaka Univ Macedonia Dept Appl Informat 156 Egnatia St Thessaloniki 54006 Greece Nagoya Inst Technol Dept Sci & Engn Simulat Nagoya Aichi 4668555 Japan

It is widely accepted that the growth of Internet and the improvement of Internet's network conditions helped real-time applications to flourish. The demand for Ultra-High Definition video is constantly increasing. Apart from video and sound, a new kind of real-time data is making its appearance, haptic data. The efficient synchronization of video, audio, and haptic data is a rather challenging effort. The new High-Efficiency Video Coding (HEVC) is quite promising for real-time ultra-high definition video transferring through the Internet. This paper presents related work on High-Efficiency Video Coding. It points out the challenges and the synchronization techniques that have been proposed for synchronizing video and haptic data. Comparative tests between H.264 and HEVC are undertaken. Measurements for the network conditions of the Internet are carried out. The equations for the transferring delay of all the inter-prediction configurations of the HEVC are defined. Finally, it proposes a new efficient algorithm for transferring a real-time HEVC stream with haptic data through the Internet.

关键词： Haptics HEVC High-Efficiency Video Coding Algorithm synchronization techniques Inter-prediction Haptic data

来源：评论

学校读者我要写书评

暂无评论

A NONDETERMINISTIC PARALLEL ALGORITHM FOR GENERAL UNSYMMETRIC SPARSE LU FACTORIZATION

引用

SIAM JOURNAL ON MATRIX ANALYSIS AND APPLICATIONS 1990年第3期11卷 383-402页

作者： DAVIS, TA YEW, PC EUROPEAN CTR RES & ADV TRAINING SCI COMPUTAT F-31057 TOULOUSEFRANCE

A parallel algorithm for the direct LU factorization of general unsymmetric sparse matrices is presented. The algorithm D2 is based on a new nondeterministic parallel pivot search that finds a compatible pivot setSS{\... 详细信息

S

${\bf S}$ of size m, followed by a parallel rank-m update. These two steps alternate until switching to dense matrix code or until the matrix is factored. The algorithm is based on a shared-memory multiple-instruction-multiple-data (MIMD) model and takes advantage of both concurrency and (gather-scatter) vectorization. The detection of parallelism due

关键词： 65F50 65W05 65F05 65-04 68-04 LU factorization general unsymmetric sparse matrices parallel algorithms nondeterministic algorithms synchronization techniques

来源：评论

学校读者我要写书评

暂无评论

Virtues and Limitations of Commodity Hardware Transactional Memory 14

Virtues and Limitations of Commodity Hardware Transactional ...

引用

23rd International Conference on Parallel Architectures and Compilation techniques (PACT)

作者： Diegues, Nuno Romano, Paolo Rodrigues, Luis Univ Lisbon Inst Super Tecn INESC ID Lisbon Portugal

ISBN: (纸本)9781450328098

Over the last years Transactional Memory (TM) gained growing popularity as a simpler, attractive alternative to classic lock-based synchronization schemes. Recently, the TM landscape has been profoundly changed by the integration of Hardware TM (HTM) in Intel commodity processors, raising a number of questions on the future of TM. We seek answers to these questions by conducting the largest study on TM to date, comparing different locking techniques, hardware and software TMs, as well as different combinations of these mechanisms, from the dual perspective of performance and power consumption. Our study sheds a mix of light and shadows on currently available commodity HTM: on one hand, we identify workloads in which HTM clearly outperforms any alternative synchronization mechanism;on the other hand, we show that current HTM implementations suffer of restrictions that narrow the scope in which these can be more effective than state of the art software solutions. Thanks to the results of our study, we identify a number of compelling research problems in the areas of TM design, compilers and self-tuning.

关键词： Empirical Study synchronization techniques Transactional Memory Performance Energy Efficiency

来源：评论

学校读者我要写书评

暂无评论

A Real-Time Sequence Components Decomposition for Transient Analysis in Grid-connected Distributed Generation Systems

A Real-Time Sequence Components Decomposition for Transient ...

引用

IEEE International Symposium on Industrial Electronics

作者： Yazdani, Davood Bakhshai, Alireza Joos, Geza Queens Univ Dept Elect & Comp Engn Kingston ON Canada McGill Univ Dept Elect & Comp Engn Montreal PQ Canada

ISBN: (纸本)9781424416653

This paper introduces a new adaptive notch filtering (ANF) method for detection of symmetrical components. This is a powerful tool for synchronization of converter-interfaced distributed generation (DG) systems. The technique is simple and offers high degree of immunity and insensitivity to power system disturbances, harmonics and other types of pollutions that exist in the grid signal. The proposed technique is capable of decomposing three-phase quantities into symmetrical components and tracking the frequency and amplitude variations. Theoretical analysis is presented and the performance of the method is evaluated through simulation.

关键词： Grid-connected converters synchronization techniques time-domain symmetrical components Adaptive filters

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：