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A paper-based organic electrochemical transistor array with a simplified configuration for simultaneous multi-ion detection

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TALANTA 2025年 282卷 126957页

作者： Dasca, Ariadna Blondeau, Pascal Riu, Jordi Andrade, Francisco J. Univ Rovira I Virgili URV Dept Quim Analit & Quim Organ C Marcel Li Domingo 1 Tarragona 43007 Spain

In recent years, organic electrochemical transistors (OECTs) have emerged as a promising tool to add to current analytical methods due to their high-amplification capacities, robust analytical performance, and versatility. The present work proposes a compact multi-analyte transistor array with outstanding analytical performance. The ion-selective organic electrochemical transistors (IS-OECTs) were developed by combining the thick-film technology with the optimum ion-selective membrane, resulting in highly sensitive and selective IS-OECTs. The system has then been simplified using only a power supply for each OECT and a single gate electrode. To prove these advantages, the IS-OECT array of sensors has been combined with multivariate models to simultaneously detect and quantify sodium, potassium and ammonium ions in human saliva. The results obtained have been validated against reference techniques, showing promising results and confirming the usefulness of the newly developed sensing array.

关键词： transistor array Organic electrochemical transistor Paper-based sensors Chemometrics Saliva

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Transparent Flexible Nanoline Field-Effect transistor array with High Integration in a Large Area

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ACS NANO 2020年第1期14卷 907-918页

作者： Kim, Dong Wook Min, Sung-Yong Lee, Yeongjun Jeong, Unyong Pohang Univ Sci & Technol POSTECH Dept Mat Sci & Engn 77 Cheongam Ro Pohang 37673 Gyeongbuk South Korea Seoul Natl Univ Dept Mat Sci & Engn 1 Gwanak Gu Seoul 08826 South Korea

Transparent flexible transistor array requests large-area fabrication, high integration, high manufacturing throughput, inexpensive process, uniformity in transistor performance, and reproducibility. This study suggests a facile and reliable approach to meet the requirements. We use the Al-coated polymer nanofiber patterns obtained by electrohydrodynamic (EHD) printing as a photomask. We use the lithography and deposition to produce highly aligned nanolines (NLs) of metals, insulators, and semiconductors on large substrates. With these NLs, we demonstrate a highly integrated NL field-effect transistor (NL-FET) array (10(5)/(4 X 4 in(2)), 254 pixel-per-inch) made of pentacene and indium zinc oxide semiconductor NLs. In addition, we demonstrate a NL complementary inverter (NL-CI) circuit consisting of pentacene NLs. The and fullerene NL-FET array shows high transparency (similar to 90%), flexibility (stable at 2.5 mm bending radius), uniformity (similar to 90%), and high performances (mobility = 0.52 cm(2)/(V s), on-off ratio = 7.0 X 10(6)). The NL-CI circuit also shows high transparency, flexibility, and typical switching characteristic with a gain of 21. The reliable large-scale fabrication of the various NLs proposed in this study is expected to be applied for manufacturing transparent flexible nanoelectronic devices.

关键词： transparent transistor flexible transistor high integration nanofiber nanoline transistor array complementary inverter

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Structured Analog Circuit and Layout Design with transistor array

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IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES 2013年第12期E96A卷 2475-2486页

作者： Yang, Bo Dong, Qing Li, Jing Nakatake, Shigetoshi Design Algorithm Lab Inc Kitakyushu Fukuoka 8080135 Japan Univ Kitakyushu Kitakyushu Fukuoka 8080135 Japan

This paper proposes a novel design method involving the stages from analog circuit design to layout synthesis in hope of suppressing the process-induced variations with a design style called transistor array. We manage to decompose the transistors into unified sub-transistors, and arrange the sub-transistors on a uniform placement grid so that a better post-CMP profile is expected to be achieved, and that the STI-stress is evened up to alleviate the process variations. However, since lack of direct theoretical support to the transistor decomposition, we analyze and evaluate the errors arising from the decomposition in both large and small signal analysis. A test chip with decomposed transistors on it confirmed our analysis and suggested that the errors are negligibly small and the design with transistor array is applicable. Based on this conclusion, a design flow with transistor array covering from circuit design to layout synthesis is proposed, and several design cases, including three common-source amplifiers, three two-stage OPAMPS and a nano-watt current reference, are implemented on a test chip with the proposed method, to demonstrate the feasibility of our idea. The measurement results from the chip confirmed that the designs with transistor array are successful, and the proposed method is applicable.

关键词： transistor array channel decomposition structured analog design manufacturability

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A pattern recognition approach to transistor array parameter variance

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PHYSICA A-STATISTICAL MECHANICS AND ITS APPLICATIONS 2018年 499卷 176-185页

作者： Costa, Luciano da F. Silva, Filipi N. Comin, Cesar H. Univ Sao Paulo Sao Carlos Inst Phys Sao Carlos SP Brazil Univ Fed Sao Carlos Dept Comp Sci Sao Carlos SP Brazil

The properties of semiconductor devices, including bipolar junction transistors (BJTs), are known to vary substantially in terms of their parameters. In this work, an experimental approach, including pattern recognition concepts and methods such as principal component analysis (PCA) and linear discriminant analysis (LDA), was used to experimentally investigate the variation among BJTs belonging to integrated circuits known as transistor arrays. It was shown that a good deal of the devices variance can be captured using only two PCA axes. It was also verified that, though substantially small variation of parameters is observed for BJT from the same array, larger variation arises between BJTs from distinct arrays, suggesting the consideration of device characteristics in more critical analog designs. As a consequence of its supervised nature, LDA was able to provide a substantial separation of the BJT into clusters, corresponding to each transistor array. In addition, the LDA mapping into two dimensions revealed a clear relationship between the considered measurements. Interestingly, a specific mapping suggested by the PCA, involving the total harmonic distortion variation expressed in terms of the average voltage gain, yielded an even better separation between the transistor array clusters. All in all, this work yielded interesting results from both semiconductor engineering and pattern recognition perspectives. (c) 2018 Elsevier B.V. All rights reserved.

关键词： transistor array transistor parameters BJT pattern recognition

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Artificial Vision Adaption Mimicked by an Optoelectrical In2O3transistor array

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NANO LETTERS 2022年第8期22卷 3372-3379页

作者： Jin, Chenxing Liu, Wanrong Xu, Yunchao Huang, Yulong Nie, Yiling Shi, Xiaofang Zhang, Gengming He, Pei Zhang, Jian Cao, Hongtao Sun, Jia Yang, Junliang Cent South Univ Sch Phys & Elect Hunan Key Lab Super Microstructure & Ultrafast Pr Changsha 410083 Hunan Peoples R China Cent South Univ Sch Phys & Elect Hunan Key Lab Nanophoton & Devices Changsha 410083 Hunan Peoples R China Guilin Univ Elect Technol Sch Mat Sci & Engn Guilin 541004 Peoples R China Chinese Acad Sci Ningbo Inst Mat Technol & Engn Lab Adv Nano Mat & Devices Ningbo 315201 Peoples R China

Simulation of biological visual perception has gainedconsiderable attention. In this paper, an optoelectrical In2O3transistor array with a negative photoconductivity behavior isdesigned using a side-gate structure and a screen-printed ion-gel asthe gate insulator. This paper is thefirst to observe a negativephotoconductivity in electrolyte-gated oxide devices. Furthermore, anartificial visual perception system capable of self-adapting toenvironmental lightness is mimicked using the proposed devicearray. The transistor device array shows a self-adaptive behavior oflight under different levels of light intensity, successfully demonstrat-ing the visual adaption with an adjustable threshold range to the external environment. This study provides a new way to create anenvironmentally adaptive artificial visual perception system and has far-reaching significance for the future of neuromorphicelectronics.

关键词： screen-printing ion-gel transistor array negative photoconductivity environmental self-adaptation artificial visual perception

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Critical point defect detection for small-pixel thin-film transistor array applied to medical display

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JOURNAL OF THE SOCIETY FOR INFORMATION DISPLAY 2013年第9期21卷 376-380页

作者： Wang, Yao-Chin Lin, Bor-Shyh Natl Chiao Tung Univ Inst Photon Syst Hsinchu Taiwan Natl Chiao Tung Univ Inst Imaging & Biomed Photon Hsinchu Taiwan Natl Chiao Tung Univ Biomed Elect Translat Res Ctr Hsinchu Taiwan Chi Mei Med Ctr Dept Med Res Tainan Taiwan

Thin-film transistor (TFT) array testing technique has been used, which provides defect detection capability to control the yield of the TFT process. In the past, several defect inspection technologies have been developed and applied for the TFT array testing. When the TFT array pixel size is getting smaller and the resolution is higher, they also encounter the performance limitation on detecting the critical defect in this small-pixel TFT array and facing a limited testing requirement. For medical display applications, the display pixels on an array panel are getting smaller and smaller; therefore, defect detection is getting more important and critical for managing yield with quality. In this study, a novel approach for defect detection was proposed. Here, the proposed voltage imaging technique is used for the TFT array test, and it provides better small-pixel TFT array defect detection capability. The experimental results show that by using the voltage imaging technique, detecting critical point defect of TFT array can be effectively improved. And the detected small-pixel size of TFT array panels can be smaller than 55 μm of an advanced medical display.

关键词： defect detection small-pixel TFT array medical display transistor array Defect detection Thin film transistors arrays

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Flexible multi-electrode neural probe using active-matrix design of transistor array

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SENSORS AND ACTUATORS A-PHYSICAL 2024年 372卷

作者： Chae, Jiwon Kim, Dongsu Pyo, Goeun Heo, Su Jin Kim, Joonghyun Shin, Kwonsik Jun, Byoung Ok Kang, Hongki Kwon, Hyuk-Jun Choi, Ji-Woong Lee, Junghyup Jang, Jae Eun Daegu Gyeongbuk Inst Sci & Technol DGIST Dept Elect Engn & Comp Sci Daegu 42988 South Korea Samsung Elect Co Ltd Hwaseong 18448 South Korea Univ Cambridge Inst Mfg Dept Engn Cambridge CB3 0FS England Seoul Natl Univ Coll Med Dept Biomed Engn Seoul 03080 South Korea

To realize a brain-machine interface, a neural probe is one of key hardware. For the neural probe, a high spatial resolution of an electrode array, high electrical sensitivity, and mechanical flexibility remain challenging and essential issues. In regard to these, implantable multi-electrode neural probe employing active-matrix design with field effect transistors (FETs) can attract attention due to their advantages of a suitable integration density and good signal-amplifying abilities. Therefore, we developed a flexible multi-electrode neural probe employing an active-matrix design based on a two-transistor (2T) scheme for application to a flexible neural signal recording probe. As a proof of concept, 4 x 8 electrode array (32 channels) with TFTs was demonstrated. For the flexible active-matrix design, back-gate indium-gallium-zinc-oxide (IGZO) thin film transistors (TFTs) were fabricated on a polyimide (PI). The TFTs used here can amplify signals and achieve a switching function to drive the active matrix. The probe structure was encapsulated by the same PI material again to achieve flexibility with good reliability, as the sandwich-like structure can induce a neutral plane on the TFT and electrodes. To ensure a high signal-to-noise ratio, the structural and process parameters of the TFT were studied. Among different annealing times and temperatures of the IGZO TFT, the optimized annealing condition of the TFT was found to be 250 degrees C a 1 hour on a flexible substrate. The width over length of the transistors was optimized to 50 mu m/10 mu m, and the field-effect mobility was 8.33 cm(2)/Vs. The on current was 2.28 x 10(-6) A at a low driving voltage of 5 V. The transconductance was 2.16 mu S and the threshold voltage (V-th) was 1.6 V. By applying 5 V, the switching TFT was turned on, and a doubly amplified signal (> 2.4 times) could be measured on the drain line. The electrode array probe with the active-matrix design can use for accurate neural re

关键词： Active matrix Neural probe transistor array IGZO TFT

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A CMOS-Compatible, Neuro-transistor array with Monolithically-integrated Circuit for Studying Cultured Neuronal Networks

A CMOS-Compatible, Neuro-transistor Array with Monolithicall...

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10th IEEE International New Circuits and Systems Conference (NEWCAS)

作者： Wu, Hsiang-Chiu Chang, Sheng-Jen Chen, Hsin Natl Tsing Hua Univ Inst Elect Engn Hsinchu 30013 Taiwan

ISBN: (纸本)9781467308595

In-plan microelectrode arrays have been proven to be useful tools for studying the connection and functions of neural tissues. But the number of electrodes is limited by the complex integration between sensors and signal-processing circuits. This paper presents a single-chip neural-electronic interface integrating the oxide-semiconductor filed effect transistors (OSFETs) with the signal-processing circuits. The chip is fabricated in the standard TSMC 0.35 mu m process, and then by die-level CMOS post process.

关键词： transistor array Nerve Tissue signal processing Neural network Artificial neural networks Electric circuits POST-PROCESSING Electrodes Sensors arrays LACTIC ACID FERMENTED

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Maskless Femtosecond-Laser-Processed Ionotronic Double-Gate transistor array for Pattern Adaptation Emulation

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ADVANCED FUNCTIONAL MATERIALS 2024年第34期34卷 2400822-2400822页

作者： Zhang, Yi Pei, Jiaqing Huang, Zhuohui Jiang, Leyong Yin, Kai Jiang, Jie Cent South Univ Sch Phys Hunan Key Lab Nanophoton & Devices Hunan Key Lab Super Microstruct & Ultrafast Proc Changsha 410083 Hunan Peoples R China Hunan Normal Univ Sch Phys & Elect Changsha 410081 Hunan Peoples R China

Sensory adaptation is a very important function of the biological nervous system to maintain survival. It helps us to better perceive, understand, and adapt to the environment. Therefore, building artificial sensory adaptation systems through neuromorphic devices is a goal that humans have been continuously pursuing. Unfortunately, current research has either based on individual adaptive devices or employed complex processes. At present, a facile fabrication of adaptive device arrays is still a great challenge. Herein, a maskless ionotronic double-gate oxide transistor array with pattern adaptation function is demonstrated using femtosecond laser process. Such process is a maskless patterning technology and free of chemical contamination, enabling a facile integration of device arrays. The as-fabricated transistor exhibits a low subthreshold swing of 265 mV dec-1 and a reasonable current switching ratio of approximate to 103 under a low operating voltage of 1 V. Interestingly, it can achieve a transition from nonadaptive to adaptive behavior by the other gate terminal. Moreover, the desensitization behavior after adaptation can be realized for mimicking the self-protection capability of biological sensory systems. Finally, a 2 x 2 transistor array is demonstrated for emulating the experience-dependent pattern adaptation ability in the human brain. Therefore, this adaptive device array using femtosecond laser process may provide a good opportunity for the artificial sensory adaptation systems and the next-generation bionic robots. The femtosecond laser with fast, maskfree, and contamination-free characteristics is proposed as a patterning technology to fabricate an adaptive ionotronic oxide transistor array. The array can mimic the pattern adaptation function in the human brain, which may be very promising for the artificial sensory adaptation systems. image

关键词： femtosecond laser maskless pattern adaptation transistor array

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Lithography analysis of via-configurable transistor-array fabrics

Lithography analysis of via-configurable transistor-array fa...

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30th NORCHIP Conference

作者： Dal Bem, Vinicius Reis, Andre I. Ribas, Renato P. Univ Fed Rio Grande do Sul PGMICRO Inst Informat Porto Alegre RS Brazil

ISBN: (纸本)9781467322232

Regular fabrics are expected to mitigate manufacturing process variations, increasing the fabrication yield in deep sub-micron CMOS technologies. This paper presents an extensive analysis of lithography behaviour of transistor-array based regular fabrics. Four different approaches presented in the literature (VCC, INVA, VCLB and VCTA) have been evaluated through lithography simulations. The well-established concept of edge placement error (EPE) has been taken into account as lithography behavior metric.

关键词： transistor array via-configurable fabrics lithography simulation CMOS digital IC design

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