A scalable, programmable turbo decoder architecture is presented in this paper. The starting point is a comparison of the existing techniques on basis of scalability, area and power consumption. The results from these...
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ISBN:
(纸本)0780385047
A scalable, programmable turbo decoder architecture is presented in this paper. The starting point is a comparison of the existing techniques on basis of scalability, area and power consumption. The results from these comparisons lead to a hybrid technique on which our architecture concept is based. The architecture is consisting of clusters each of which is a VLIW architecture. The upsizing is possible by adding a cluster and dividing the two data memories in banks. The window size is chosen according to the number of banks to prevent the conflicts. At the end of the paper, a short evaluation of the architecture is presented.
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