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Optimal voltage Allocation Techniques for Dynamically variable voltage processors

ACM Transactions on Embedded Computing Systems 2005年第1期4卷 211-230页

作者： Kwon, Woo-Cheol Kim, Taewhan CAE Center Samsung Electronics Co. Ltd. Yongin San 24 Nongseo-Ri Kiheung-Eup 449-711 South Korea School of Electrical Engineering Seoul National University Seoul Kwanak 34 151-600 South Korea

This paper presents important, new results of a study on the problem of task scheduling and voltage allocation in dynamically variable voltage processors, the purpose of which was minimization of processor energy consumption. The contributions are twofold: (1) For given multiple discrete supply voltages and tasks with arbitrary arrival-time/deadline constraints, we propose a voltage allocation technique that produces a feasible task schedule with optimal processor energy consumption. (2) We then extend the problem to include the case in which tasks have nonuniform loads (i.e.;switched) capacitances and solve it optimally. The proposed technique, called Alloc-vt, in (1) is based on the prior results in [Yao, Demers and Shenker. 1995. In Proceedings of IEEE Symposium on Foundations of Computer Science. 374-382] (which is optimal for dynamically continuously variable voltages, but not for discrete ones) and [Ishihara and Yasuura. 1998. In Proceedings of International Symposium on Low Power Electronics and Design. 197-202] (which is optimal for a single task, but not for multiple tasks), whereas the proposed technique, called Alloc-vtcap, in (2) is based on an efficient linear programming (LP) formulation. Both techniques solve the allocation problems optimally in polynomial time. © 2005, ACM. All rights reserved.

关键词： Algorithms Design Dynamic voltage scaling low power design Performance scheduling variable voltage processor

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An efficient algorithm for computing optimal discrete voltage schedules

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SIAM JOURNAL ON COMPUTING 2006年第3期35卷 658-671页

作者： Li, MM Yao, FF Tsinghua Univ Dept Comp Sci & Technol State Key Lab Intelligent Technol & Syst Beijing Peoples R China City Univ Hong Kong Dept Comp Sci Hong Kong Hong Kong Peoples R China

We consider the problem of job scheduling on a variable voltage processor with d discrete voltage/speed levels. We give an algorithm which constructs a minimum energy schedule for n jobs in O(dn log n) time. Previous approaches solve this problem by first computing the optimal continuous solution in O(n(3)) time and then adjusting the speed to discrete levels. In our approach, the optimal discrete solution is characterized and computed directly from the inputs. We also show that O( n log n) time is required;hence the algorithm is optimal for fixed d.

关键词： scheduling energy efficiency variable voltage processor discrete optimization

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Ontimal intratask dynamic voltage-scaling technique and its practical extensions

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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2006年第1期25卷 47-57页

作者： Seo, J Kim, T Lee, J Samsung Elect Visual Display Div Suwon 433742 South Korea Seoul Natl Univ Sch Elect Engn & Comp Sci Seoul 151744 South Korea Korea Adv Inst Sci & Technol Div Comp Sci Dept Elect Engn & Comp Sci Taejon 305701 South Korea

This paper presents a set of comprehensive techniques for the intratask voltage-scheduling problem to reduce energy consumption in hard real-time tasks of embedded systems. Based on the execution profile of the task, a voltage-scheduling technique that optimally determines the operating voltages to individual basic blocks in the task is proposed. The obtained voltage schedule guarantees minimum average energy consumption. The proposed technique is then extended to solve practical issues regarding transition overheads, which are totally or partially ignored in the existing approaches. Finally, a technique involving a novel extension of our optimal scheduler is proposed to solve the scheduling problem in a discretely variable voltage environment. We also present a novel voltage set-tip technique to determine each voltage level for customizable systems-on-chips (SoCs) with discretely variable voltages. In summary, it is confirmed from experiments that the proposed optimal scheduling technique reduces energy consumption by 20.2% over that of one of the state-of-the-art schedulers (Shin and Kim, 2001) and, further, the extended technique in a discrete-voltage environment reduces energy consumption by 45.3% on average.

关键词： DVS intratask voltage scheduling low-power design variable voltage processor

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Min-energy voltage allocation for tree-structured tasks

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JOURNAL OF COMBINATORIAL OPTIMIZATION 2006年第3期11卷 305-319页

作者： Li, MM Liu, BJ Yao, FF City Univ Hong Kong Dept Comp Sci Hong Kong Hong Kong Peoples R China Tsinghua Univ Dept Comp Sci Beijing 100084 Peoples R China

We study job scheduling on processors capable of running at variable voltage/speed to minimize energy consumption. Each job in a problem instance is specified by its arrival time and deadline, together with required number of CPU cycles. It is known that the minimum energy schedule for n jobs can be computed in O(n(3)) time, assuming a convex energy function. We investigate more efficient algorithms for computing the optimal schedule when the job sets have certain special structures. When the time intervals are structured as trees, the minimum energy schedule is shown to have a succinct characterization and is computable in time O(P) where P is the tree's total path length. We also study an on-line average-rate heuristics AVR and prove that its energy consumption achieves a small constant competitive ratio for nested job sets and for job sets with limited overlap. Some simulation results are also given.

关键词： scheduling variable voltage processor energy efficiency

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Reward-based voltage scheduling for dynamic-priority hard real-time systems

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DESIGN AUTOMATION FOR EMBEDDED SYSTEMS 2007年第1期11卷 25-48页

作者： Yun, Han-Saem Kim, Jihong Seoul Natl Univ Sch Comp Sci & Engn Seoul 151742 South Korea

Reward-based scheduling has been investigated for flexible applications in which an approximate but timely result is acceptable. Meanwhile, significant research efforts have been made on voltage scheduling which exploits the tradeoff between the processor speed and the energy consumption. In this paper, we address the combined scheduling problem of maximizing the total reward of hard real-time systems with a given energy budget. We present an optimal off-line algorithm and an efficient on-line algorithm for jobs with their own release-times/deadlines under Earliest-Deadline-First (EDF) scheduling. Experimental results show that the solution computed by the on-line algorithm is no more than 14% worse than the theoretical optimal solution obtained by the optimal off-line algorithm.

关键词： dynamic voltage scaling variable voltage processor reward-based scheduling

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On Energy-Optimal voltage Scheduling for Fixed-Priority Hard Real-Time Systems

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ACM Transactions on Embedded Computing Systems 2003年第3期2卷 393-430页

作者： Yun, Han-Saem Kim, Jihong School of Computer Science and Engineering Seoul National University Seoul Shilim-dong Kwanak-ku 151-742 South Korea

We address the problem of energy-optimal voltage scheduling for fixed-priority hard real-time systems, on which we present a complete treatment both theoretically and practically. Although most practical real-time systems are based on fixed-priority scheduling, there have been few research results known on the energy-optimal fixed-priority scheduling problem. First, we prove that the problem is NP-hard. Then, we present a fully polynomial time approximation scheme (FPTAS) for the problem. For any ɛ>0, the proposed approximation scheme computes a voltage schedule whose energy consumption is at most (1+ɛ) times that of the optimal voltage schedule. Furthermore, the running time of the proposed approximation scheme is bounded by a polynomial function of the number of input jobs and 1/ɛ. Given the NP-hardness of the problem, the proposed approximation scheme is practically the best solution because it can compute a near-optimal voltage schedule (i.e., provably arbitrarily close to the optimal schedule) in polynomial time. Experimental results show that the approximation scheme finds more efficient (almost optimal) voltage schedules faster than the best existing heuristic. © 2003, ACM. All rights reserved.

关键词： Algorithms approximation algorithms dynamic voltage scaling Fixed-priority scheduling fully polynomial time approximation scheme real-time systems variable voltage processor

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A Low-Power Implementation of 3D Graphics System for Embedded Mobile Systems 06

A Low-Power Implementation of 3D Graphics System for Embedde...

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Proceedings of the 2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia

作者： Chanmin Park Hyunhee Kim Jihong Kim Sch. of Comput. Sci.&Eng. Seoul Nat. Univ.

ISBN: (纸本)9780780397835

For mobile 3D graphics systems, even though performance requirements are met, an efficient power management is even more important for battery-powered mobile devices since they require a large number of arithmetic operations as well as a high frequency of memory accesses. According to the analysis of the power consumption of mobile 3D graphics pipelines and the slacks across the pipeline stages, we describe intra-frame and inter-frame DVS low-power techniques reducing the power consumption of mobile devices based on a variable voltage processor. Our implementation on a PDA development board shows that the proposed DVS techniques achieve an energy saving of up to 46% over a non-DVS implementation

关键词： embedded mobile system interframe DVS variable voltage processor 3D graphics pipeline personal digital assistant memory access intraframe dynamic voltage scaling PDA development board power consumption power management battery-powered mobile device

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