The principal theme herein is the direct hardware implementation on a special-purpose network of processors, the wavefront array processor (WAP), of an alternate matrix procedure for the solution of linear systems Ax ...
详细信息
The principal theme herein is the direct hardware implementation on a special-purpose network of processors, the wavefront array processor (WAP), of an alternate matrix procedure for the solution of linear systems Ax = b , where A is a compact dense ( n × n ) matrix. The method is based on the factorization of the coefficient matrix into components which are of ‘butterfly’ form, i.e., interlocking matrix quadrants, and for its implementation the concept of computational ‘dewavefronts’ is investigated.
This paper describes a new architecture for discrete cosine transform (DCT)-based motion estimation and compensation. Previous methods do not take sufficient advantage of the sparseness of two-dimensional (2-D) DCT co...
详细信息
This paper describes a new architecture for discrete cosine transform (DCT)-based motion estimation and compensation. Previous methods do not take sufficient advantage of the sparseness of two-dimensional (2-D) DCT coefficients to reduce execution time. We first derive a recursion equation for transform domain motion estimation;we then use it to develop a wave-front arrayprocessor consisting of highly regular, parallel, and pipelined processing elements that more efficiently performs motion estimation. In addition, we show that the recursion equation enables motion predicted images with different frequency bands, for example, from the images with low-frequency components to the images with low- and high-frequency components. The wavefront array processor can reconfigure to different motion estimation algorithms, such as logarithmic search and three step search, without architectural modifications. These properties can be effectively used to reduce the energy required for video encoding and decoding. Simulation results on video sequences of different characteristics show that the proposed architecture achieves a significant reduction in computational complexity and processing time, with comparable performance to spatial domain approaches with respect to the peak signal to noise ratio (PSNR) and the compression ratio.
We consider the case of a 2-dimensional wavefront array processor where only one wavefront appears at any time. We show that in such a situation, this 2-dimensional wavefrontprocessor can be mapped to a linear array ...
详细信息
We consider the case of a 2-dimensional wavefront array processor where only one wavefront appears at any time. We show that in such a situation, this 2-dimensional wavefrontprocessor can be mapped to a linear arrayprocessor if the wavefronts never backtrack. The mapping will not increase the number of registers in each processor element. Two examples, the spoken words recognition problem and the longest common subsequence problem, are given to demonstrate the feasibility of this method.
暂无评论