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Through the Looking Glass—The 2025 Edition: Trends in solid-state circuits from ISSCC

IEEE Solid-State Circuits Magazine 2025年第1期17卷 97-118页

作者： Mirabbasi, Shahriar Fujino, Laura C. University of British Columbia Department of Electrical and Computer Engineering VancouverBCV6T 1Z4 Canada University of Toronto Department of Electrical and Computer Engineering TorontoONM5S 1A1 Canada

The International Solid-State Circuits Conference (ISSCC) is the flagship conference of the IEEE Solid-State Circuits Society. The theme for ISSCC 2025 is "The Silicon Engine Driving the Artificial Intelligence (AI) Revolution." This theme further highlights how today’s IC research and development can contribute to the solid-state foundation upon which AI is rapidly evolving and pervasively entering people’s lives. ISSCC 2025 is the 72nd edition of ISSCC and is more than ever focused on innovation, in particular, innovative solutions that facilitate the efficient implementation of AI algorithms. To enhance and support the widespread use of AI, ISSCC 2025 promotes and shares new circuit ideas that advance the state of the art in IC design and further equip AI systems with improved functionality and efficiency. © 2025 IEEE.

关键词： Timing circuits

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New Monolithic Modular DC-DC Converter for Constant Current Offshore Interconnection With VSC HVdc Network

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IEEE Access 2025年 13卷 71806-71821页

作者： Mansour, Mohamed Abdel-Moneim, Mohamed G. Abdel-Khalik, Ayman S. Ahmed, Shehab Ahmed, Khaled H. Tennessee Tech University Department of Electrical and Computer Engineering CookevilleTN38501 United States Alexandria University Department of Electrical Engineering Alexandria21526 Egypt Sultan Qaboos University Department of Electrical and Computer Engineering Muscat123 Oman Division Thuwal23955 Saudi Arabia University of Strathclyde Department of Electronic and Electrical Engineering GlasgowG1 1XQ United Kingdom

The rapid growth in HVDC (High Voltage Direct Current) grids has shown the falls of point-to-point connections. Several challenges such as the requirement of DC (Direct Current) fault blocking capability, interfacing of different grounding schemes, offering multi-vendor interoperability, and difficult to achieve high DC voltage stepping, represent serious issues to deployment of HVDC grids. DC-DC converters are considered the optimum candidate to overcome these challenges in HVDC grids interconnection. In this paper, a novel isolated hybrid monolithic modular DC-DC converter is proposed that interconnects LCC/VSC (Line Commutated Converter/Voltage Source Converter) based HVDC networks. It achieves smaller count of semiconductors, lower conduction losses and DC fault blocking. Detailed mathematical analysis, design, and control of the proposed DC-DC converter are illustrated. Also, both simulation model and experimental test rig are built to validate the proposed DC-DC converter under different normal operational and fault scenarios. © 201. IEEE.

关键词： HVDC power transmission

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A Low Static-Power D Flip-Flop with Unipolar Thin Film Transistors on a Flexible Substrate

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IEEE Journal of the Electron Devices Society 2025年 13卷 406-413页

作者： Ranjan, Shubham Kapar, Sparsh Lee, Czang-Ho Wong, William Sachdev, Manoj University of Waterloo Department of Electrical and Computer Engineering WaterlooONN2L3G1 Canada

There is increasing interest in affordable and flexible electronics, driven by the need for displays, conformable body sensors, and internet-of-things (IoT) gadgets. Amorphous silicon (a-Si:H), transition metal oxides, and organic thin-film transistors (TFTs) have demonstrated cost-effective large-scale production. As TFTs are typically unipolar in nature, they pose challenges for implementing CMOS-like circuits. Conventional methods to realize circuits in these technologies often lead to restricted voltage swing and excessive direct path current. While several methods have been proposed to counter the voltage swing issue, these methods fail to address the direct path current problem. This article presents low static-power D flip-flops (DFFs) using unipolar TFTs, which significantly reduces the direct path current. The proposed and conventional DFF designs were fabricated on a glass and flexible substrate using a-Si:H TFTs. Additionally, the impact of bending the flexible substrates was examined to assess the robustness and performance of the DFFs under mechanical strain. The measurement results show that the proposed design based DFF saves average total power by 79.8% compared to conventional design. © 201. IEEE.

关键词： Amorphous silicon

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On the Asymptotic Rate of Optimal Codes That Correct Tandem Duplications for Nanopore Sequencing

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IEEE Transactions on Information Theory 2025年第5期71卷 3569-3581页

作者： Yu, Wenjun Ye, Zuo Schwartz, Moshe Ben-Gurion University of the Negev School of Electrical and Computer Engineering Be’er Sheva8410501 Israel McMaster University Department of Electrical and Computer Engineering ON HamiltonL8S 4K1 Canada

We study codes that can correct backtracking errors during nanopore sequencing. In this channel, a sequence of length n over an alphabet of size q is being read by a sliding window of length , where from each window we obtain only its composition. Backtracking errors cause some windows to repeat, hence manifesting as tandem-duplication errors of fixed length k in the -read vector of window compositions. While existing constructions for duplication-correcting codes can be straightforwardly adapted to this model, even resulting in optimal codes, their asymptotic rate is hard to find. In the regime of unbounded number of duplication errors, we either give the exact asymptotic rate of optimal codes, or bounds on it, depending on the values of k, and q. In the regime of a constant number of duplication errors, t, we find the redundancy of optimal codes to be t logqn+O(1. when |k , and only upper bounded by this quantity otherwise. © 1.63-201. IEEE.

关键词： Nanopores

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Convolutional CFS-PML for the 2-D Crank-Nicolson FDTD Scheme and Its Application in Simulation of Ultra-Low Frequency Electromagnetic Problems

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IEEE Transactions on Antennas and Propagation 2025年第5期73卷 3095-3107页

作者： Roohie, Mohammadreza Rezaei-Zare, Afshin York University Department of Electrical Engineering and Computer Science TorontoM3J 1P3 Canada

A convolutional implementation of the perfectly matched layer (PML) absorbing boundary condition (ABC) with complex frequency-shifted (CFS) constitutive parameters is developed for the original two-dimensional (2-D) Crank-Nicolson (CN) scheme of the finite-difference time-domain (FDTD) method. The proposed CN-FDTD method leverages the benefits of both CFS-PML and the unconditionally stable CN scheme, overcoming the stability limits of the conventional FDTD method and decreasing the numerical reflection of evanescent waves. The effectiveness of the proposed scheme is validated by conducting an analysis of the absorbing boundary reflection error and the simulation speed. For an ultra-low frequency and small-scale problem with an extremely fine spatial mesh size (2×1.7 times smaller than the minimum exited wavelength) and using time steps 4×1.6 times larger than those in conventional FDTD, we achieved a CPU time improvement of up to 2.9360×1.4 times compared to the conventional FDTD method, with less than 3% numerical error. © 1.63-201. IEEE.

关键词： Finite difference time domain method

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CMOS Nanopore-Based DNA Sequencing Systems: Recent Advancements and Future Prospects: A Review

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IEEE Sensors Journal 2025年第9期25卷 14539-14556页

作者： Asgari, Sepideh Mohammadpanah, Amirhossein Ghafar-Zadeh, Ebrahim Magierowski, Sebastian York University Lassonde School of Engineering Department of Electrical Engineering and Computer Science TorontoONM3J 1P3 Canada

Recent advancements in electrochemical detection have created significant opportunities in biosensing, particularly in medical diagnostics and health monitoring, where real-time response, high sensitivity, and accuracy are paramount. Nanopore-based deoxyribonucleic acid (DNA) sequencing has emerged as a powerful tool for high-throughput genetic analysis, relying on precise sensing mechanisms and efficient readout electronics. This review provides a comprehensive overview of both nanopore sensor architectures and CMOS readout circuits used in modern DNA sequencing technologies. We discuss different nanopore structures, their advantages, limitations, and noise reduction techniques, alongside the critical role of CMOS readout circuits in converting weak electrochemical signals into actionable data. In addition, we explore the tradeoffs between different arrayed CMOS readout architectures, highlighting challenges in power consumption, noise performance, and scalability in multichannel nanopore arrays. By analyzing these advancements, this article underscores the importance of integrating innovative sensor designs with efficient readout electronics to enhance the accuracy and throughput of next-generation biosensing platforms. © 2001.201. IEEE.

关键词： CMOS integrated circuits

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Latency Bounds for TSN Scheduling in the Presence of Clock Synchronization

IEEE Networking Letters

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IEEE Networking Letters 2025年第1期7卷 41-45页

作者： Ghosh, Aviroop Yousefi, Saleh Kunz, Thomas Carleton University Department of Systems and Computer Engineering OttawaONK1S 5B6 Canada Urmia University Department of Electrical and Computer Engineering Urmia57561-51818 Iran

The IEEE 802.1.bv (80.21.bv) standard is designed for traffic requiring deterministic and bounded latencies through strict periodic time synchronization, as specified by IEEE 802.1.S standard. However, internal clock drift in devices causes timing misalignment, introducing further challenges to 802.1.bv scheduling. Existing solutions, using either complex optimization approaches or non-trivial scheduling heuristics, address this by scheduling frame transmissions only once they are guaranteed to have been fully received, even in the presence of clock drifts. However, this approach introduces additional delays that can impact deadline requirements. This letter analytically derives tight end-to-end latency bounds, allowing us to determine if stream deadlines for a given network will be violated without the need to solve for any scheduling algorithms. It also proposes an approach that results in tighter bounds based on information collected from the synchronization process. The analytical results are compared with simulation results, confirming their validity. © 201. IEEE.

关键词： Synchronization Clocks Delays Standards Schedules Logic gates Scheduling algorithms Payloads Jitter Data models

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A Novel Multi-Task Learning-Based Approach to Multi-Energy System Load Forecasting

IEEE Open Access Journal of Power and Energy

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IEEE Open Access Journal of Power and Energy 2025年 12卷 209-219页

作者： Ahmed, Zain Jamil, Mohsin Ali Khan, Ashraf Memorial University of Newfoundland Faculty of Engineering and Applied Science Department of Electrical and Computer Engineering St. John'sNLA1C 5S7 Canada

Multi-Energy Systems (MES) allow optimal interactions between different energy sources. Accurate load forecasting for such intricate systems would greatly enhance the performance and economic incentive to employ them. This article proposes a state-of-the-art deep learning based architecture to forecast multiple loads. The algorithm utilizes load correlations to select optimal input parameters. These optimal inputs are fed to D-TCNet (Deep - Temporal Convolution Network). This network uses multi-layer perceptrons (MLP) to encode the spatial relationship among exogenous variables which is fed to a Temporal Convolutional Network (TCN). The TCN resolves temporal information in the multi-load time series which is used for forecasting these loads for fixed output horizon. The proposed novel method is used on the energy consumption data for multi energy system of University of Austin Tempe Campus. The proposed method shows improved performance across all three energy types as well as all four seasons. © 2020 IEEE.

关键词： Federated learning

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Channel Capacity of Near-Field Line-of-Sight Multiuser Communications

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IEEE Transactions on Wireless Communications 2025年第5期24卷 4392-4409页

作者： Zhao, Boqun Ouyang, Chongjun Zhang, Xingqi Liu, Yuanwei University of Alberta Department of Electrical and Computer Engineering EdmontonABT6G 2R3 Canada University College Dublin School of Electrical and Electronic Engineering DublinD04 V1W8 Ireland Queen Mary University of London School of Electronic Engineering and Computer Science LondonE1 4NS United Kingdom The University of Hong Kong Department of Electrical and Electronic Engineering Hong Kong Hong Kong

The channel capacity of near-field (NF) communications is characterized by considering three types of line-of-sight multiuser channels: i) multiple access channel (MAC), ii) broadcast channel (BC), and iii) multicast channel (MC). For NF MAC and BC, closed-form expressions are derived for the sum-rate capacity as well as the capacity region under a two-user scenario. These results are further extended to scenarios with an arbitrary number of users. For NF MC, closed-form expressions are derived for the two-user channel capacity and the capacity upper bound with more users. Further insights are gleaned by exploring special cases, including scenarios with infinitely large array apertures, co-directional users, and linear arrays. For comparison, the MAC and BC sum-rates achieved by typical linear combiners and precoders are also analyzed. Theoretical and numerical results are presented and compared with far-field communications to demonstrate that: i) the NF capacity of these three channels converges to finite values rather than growing unboundedly as the number of array elements increases;ii) the capacity of the MAC and BC with co-directional users can be improved by using the additional range dimensions in NF channels to reduce inter-user interference (IUI);and iii) the MC capacity benefits less from the NF effect compared to the MAC and BC, as multicasting is less sensitive to IUI. © 2002-201. IEEE.

关键词： Multicasting

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Rate Maximization for Downlink Pinching-Antenna Systems

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IEEE Wireless Communications Letters 2025年第5期14卷 1431-1435页

作者： Xu, Yanqing Ding, Zhiguo Karagiannidis, George K. School of Science and Engineering The Chinese University of H ong Kong Shenzhen518172 China Department of Computer and Information Engineering Khalifa University Abu Dhabi United Arab Emirates Department of Electrical and Electronic Engineering University of Manchester ManchesterM1 9BB United Kingdom Department of Electrical and Computer Engineering Aristotle University of Thessaloniki Thessaloniki541 24 Greece

In this letter, we consider a new type of flexible-antenna system, termed pinching-antenna, where multiple low-cost pinching antennas, realized by activating small dielectric particles on a dielectric waveguide, are jointly used to serve a single-antenna user. Our goal is to maximize the downlink transmission rate by optimizing the locations of the pinching antennas. However, these locations affect both the path losses and the phase shifts of the user’s effective channel gain, making the problem challenging to solve. To address this challenge and solve the problem in a low complexity manner, a relaxed optimization problem is developed that minimizes the impact of path loss while ensuring that the received signals at the user are constructive. This approach leads to a two-stage algorithm: in the first stage, the locations of the pinching antennas are optimized to minimize the large-scale path loss;in the second stage, the antenna locations are refined to maximize the received signal strength. Simulation results show that pinch-antenna systems significantly outperform conventional fixed-location antenna systems, and the proposed algorithm achieves nearly the same performance as the highly complex exhaustive search-based benchmark. © copy;201. IEEE.

关键词： Benchmarking

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