This paper presents an implementation of channel estimation for LTE downlink MIMO system on a multi-core processor platform. With the development of wireless communication, it is gradually difficult for asic baseband ...
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A novel current-mode bandgap reference (BGR) with second-order temperature compensation is presented. The proposed bandgap reference adopts a novel structure, which takes advantage of the complementarity of second-ord...
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In this paper, a hardware/software co-design approach is proposed to parse the video bitstream which conforms to various video compression standards. The layered structure of the syntax elements in video bitstreams is...
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A novel bandgap reference (BGR) with ultra low supply voltage is presented. The proposed bandgap reference uses subthreshold MOSFETs to provide temperature compensation. Analysis and comparison between proposed bandga...
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Adaptive support-weight algorithm can generate high quality disparity map for stereo matching. But due to the complexity, it requires large internal memory size and bandwidth to meet the real-time constraint. In this ...
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A hardware/software co-processing system for speech recognition applications is proposed in this paper. The system consists of a soft-core microprocessor and a dedicated hardware accelerator implemented on an FPGA. Th...
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This paper presents a high performance design for Context-Based Adaptive Variable Length-Coding (CAVLC) used in the H.264/AVC standard. To reduce the cycles of processing one macroblock (MB), a two-stage residual enco...
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Highly integrated contemporary SRAM-based Field Programmable Gate Arrays (FPGAs) lead to high occurrence-rate of transient faults induced by Single Event Upsets (SEUs) in FPGAs' configuration memory. In this paper...
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An important trend of the modern mobile device is that a single user terminal that will be capable of receiving signals of multiple different transmission standards. Most of these transmission standards employ a forwa...
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The origin of the on-state current (Ion) difference between dopant-segregated Schottky (DSS) source/drain MOSFET and conventional MOSFET with 20nm channel length is investigated by device simulation. The simulation re...
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