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检索条件"机构=ASIC and System State-Key Lab"
809 条 记 录,以下是91-100 订阅
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A new dual-field elliptic curve cryptography processor
A new dual-field elliptic curve cryptography processor
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ISCAS 2006: 2006 IEEE International Symposium on Circuits and systems
作者: Yongyi, Wu Xiaoyang, Zeng State Key Lab. of ASIC and System Fudan University Shanghai 200433 China
A new Elliptic Curve Cryptography (ECC) processor is proposed in this paper, which supports Galois fields GF(p) and GF(2n) arithmetic for arbitrary prime numbers and irreducible polynomials by introducing a dualfield ... 详细信息
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High speed low power Soft-Output Viterbi decoder
High speed low power Soft-Output Viterbi decoder
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2nd Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, PrimeAsia 2010
作者: Ouyang, Gan Liu, Liang Ye, Fan Ren, Junyan State-Key Lab. of ASIC and System Fudan University Shanghai 201203 China
A high speed low power Soft-Output Viterbi decoder designed for the convolutional codes used in the ECMA-368 UWB standard is presented in this thesis. A novel hybrid SMU architecture using the trace-forward method is ... 详细信息
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Automatic layout generator for embedded FPGA cores
Automatic layout generator for embedded FPGA cores
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2011 IEEE 9th International Conference on asic, asicON 2011
作者: Yu, Chaofan Wang, Lingli Zhou, Xuegong State-Key-Lab. of ASIC and System Fudan University Shanghai 201203 China
There is a growing tendency for FPGA (Field Programmable Gate Array) IP (Intellectual Property) cores to be embedded in an SOC (system On a Chip). The embedded FPGA cores can improve the flexibility of the SOC chip. H... 详细信息
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A channel estimator for LTE downlink mapped on a multi-core processor platform
A channel estimator for LTE downlink mapped on a multi-core ...
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2011 IEEE 9th International Conference on asic, asicON 2011
作者: He, Maofei Zhang, Jiajie Fan, Wenhua Yu, Zhiyi Zeng, Xiaoyang State Key Lab. of ASIC and System Fudan University Shanghai 201203 China
This paper presents an implementation of channel estimation for LTE downlink MIMO system on a multi-core processor platform. With the development of wireless communication, it is gradually difficult for asic baseband ... 详细信息
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A 0.6 ppm/°C current-mode bandgap with second-order temperature compensation
A 0.6 ppm/°C current-mode bandgap with second-order tempera...
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2011 IEEE 9th International Conference on asic, asicON 2011
作者: Li, Yilei Wang, Yu Yan, Na Tan, Xi Min, Hao State Key Lab. of ASIC and System Fudan University Shanghai 200433 China
A novel current-mode bandgap reference (BGR) with second-order temperature compensation is presented. The proposed bandgap reference adopts a novel structure, which takes advantage of the complementarity of second-ord... 详细信息
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An energy-proportion synchronization method for IR-UWB communications
An energy-proportion synchronization method for IR-UWB commu...
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2007 IEEE International Symposium on Circuits and systems, ISCAS 2007
作者: Jing, Wang Lang, Mai Yanjie, Peng Jun, Han Xiaoyang, Zeng State Key Lab. of ASIC and System Fudan University Shanghai 201203 China
In this paper, a novel synchronization method for IR-UWB systems is proposed. Integrate-and-dump operations at the symbol rate are done over the product of the received signal and it Ts-delayed replica. The relative p... 详细信息
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A hardware/software co-design approach for multiple-standard video bitstream parsing
A hardware/software co-design approach for multiple-standard...
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2011 IEEE 9th International Conference on asic, asicON 2011
作者: Shen, Sha Zhong, Huibo Fan, Yibo Zeng, Xiaoyang State Key Lab. of ASIC and System Fudan University Shanghai 200433 China
In this paper, a hardware/software co-design approach is proposed to parse the video bitstream which conforms to various video compression standards. The layered structure of the syntax elements in video bitstreams is... 详细信息
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A low-complexity heterogeneous multi-core platform for security SoC
A low-complexity heterogeneous multi-core platform for secur...
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2010 6th IEEE Asian Solid-state Circuits Conference, A-SSCC 2010
作者: Huang, Wei Han, Jun Wang, Shuai Zeng, Xiaoyang State-Key Lab. of ASIC and System Fudan University Shanghai 201203 China
This paper presents a heterogeneous multi-core SoC platform to deal with intensive cryptography algorithms in different security protocols. And several cores are integrated in the proposed Platform, which are a MIPS-l... 详细信息
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A low power convolver for channel estimation in chinese DTMB system
A low power convolver for channel estimation in chinese DTMB...
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2008 9th International Conference on Solid-state and Integrated-Circuit Technology, ICSICT 2008
作者: Chen, Chen Chen, Yun Zeng, Xiaoyang State Key Lab. of ASIC and System Fudan University Shanghai 201203 China
This paper proposes a low power convolver in channel estimation. It works in the time domain. Ram is used instead of register chains in typical architectures. The power is compared when using different depth of rams. ... 详细信息
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A reconfigurable and ultra low-cost VLSI implementation of SHA-I and MD5 functions
A reconfigurable and ultra low-cost VLSI implementation of S...
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2007 7th International Conference on asic, asicON 2007
作者: Cao, Dan Han, Jun Zeng, Xiao-Yang State-Key Lab. of ASIC and System Fudan University Shanghai 201203 China
The hash functions are applied in the communication integrity and signature authentication. There are so many secure communication protocols which involve various hash algorithms of different security level. This pape... 详细信息
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