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检索条件"机构=ASIC and System State-Key Lab"
809 条 记 录,以下是111-120 订阅
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A 23-34 GHz Wideband GaN Low-Noise Amplifier for 5G Millimeter-Wave Applications
A 23-34 GHz Wideband GaN Low-Noise Amplifier for 5G Millimet...
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2021 IEEE International Workshop on Electromagnetics: Applications and Student Innovation Competition, iWEM 2021
作者: Li, Yubin Wu, Xueying Hu, Jun Zhang, Xiuyin Yin, Yun Xu, Hongtao State Key Laboratory of Asic and System Fudan University Shanghai201203 China Pazhou Lab Guangzhou510320 China School of Electronic and Information Engineering South China University of Technology South China University of Technology Guangzhou510641 China
This paper presents a design of 23-34 GHz wideband low-noise amplifier (LNA) based on gallium-nitride (GaN) technology. The LNA circuit employs an input matching network with few components and particularly reduces th... 详细信息
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PUFFER: A Routability-Driven Placement Framework via Cell Padding with Multiple Features and Strategy Exploration
PUFFER: A Routability-Driven Placement Framework via Cell Pa...
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Design Automation Conference
作者: Zhijie Cai Peng Zou Zhengtao Wu Xingyu Tong Jun Yu Jianli Chen Yao-Wen Chang State Key Lab of ASIC & System Fudan University Shanghai China Shanghai LEDA Technology Co. Ltd Shanghai China Graduate Institute of Electronics Engineering National Taiwan University Taipei Taiwan Department of Electrical Engineering National Taiwan University Taipei Taiwan
Placement is a critical stage in VLSI physical design, especially for routability optimization. Due to the large scale and high integration introduced by the advanced semiconductor manufacturing technology, there rema...
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Bayesian Inference on Introduced General Region: An Efficient Parametric Yield Estimation Method for Integrated Circuits
Bayesian Inference on Introduced General Region: An Efficien...
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Asia and South Pacific Design Automation Conference
作者: Zhengqi Gao Zihao Chen Jun Tao Yangfeng Su Dian Zhou Xuan Zeng State Key Lab of ASIC & System School of Microelectronics Fudan University School of Mathematics Fudan University University of Texas at Dallas
In this paper, we propose an efficient parametric yield estimation method based on Bayesian Inference. By observing that nowadays analog and mixed-signal circuit is designed via a multi-stage flow, and that the circui... 详细信息
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LinEasyBO: Scalable Bayesian optimization approach for analog circuit synthesis via one-dimensional subspaces
arXiv
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arXiv 2021年
作者: Zhang, Shuhan Yang, Fan Yan, Changhao Zhou, Dian Zeng, Xuan State Key Lab of ASIC & System Microeletronics Department Fudan University China University of Texas at Dallas Dallas United States
A large body of literature has proved that the Bayesian optimization framework is especially efficient and effective in analog circuit synthesis. However, most of the previous research works only focus on designing in... 详细信息
来源: 评论
LUXOR: An FPGA logic cell architecture for eficient compressor tree implementations
LUXOR: An FPGA logic cell architecture for eficient compress...
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2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, FPGA 2020
作者: Rasoulinezhad, Seyed Ramin Siddhartha Zhou, Hao Wang, Lingli Boland, David Leong, Philip H.W. School of Electrical and Information Engineering University of Sydney Sydney2006 Australia State Key Lab of ASIC and System Fudan University Shanghai201203 China
We propose two tiers of modiications to FPGA logic cell architecture to deliver a variety of performance and utilization beneits with only minor area overheads. In the irst tier, we augment existing commercial logic c... 详细信息
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Novel semiconductor devices based on SOL substrate
Novel semiconductor devices based on SOL substrate
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2020 China Semiconductor Technology International Conference, CSTIC 2020
作者: Xiao, K. Liu, J. Deng, J.N. Jiang, Y.L. Bao, W.Z. Zaslavsky, A. Cristoloveanu, S. Gong, X. Wan, J. State Key Lab of ASIC and System School of Information Science and Engineering Fudan University Shanghai China State Key Lab of ASIC and System School of Microelectronics Fudan University Shanghai China Brown University Department of Physics and School of Engineering ProvidenceRI02912 United States IMEP-LAHC INP-Grenoble/Minatec Grenoble38016 France Singapore
In this work, we review our recent studies on several novel devices built on silicon-on-insulator (SOI) substrates. The sharp-switching Z2-FET, based on a feedback mechanism, has been demonstrated as suitable for many... 详细信息
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An efficient batch constrained Bayesian optimization approach for analog circuit synthesis via multi-objective acquisition ensemble
arXiv
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arXiv 2021年
作者: Zhang, Shuhan Yang, Fan Yan, Changhao Zhou, Dian Zeng, Xuan State Key Lab of ASIC & System Microelectronics Department Fudan University China Department of Electrical Engineering The University of Texas Dallas United States
Bayesian optimization is a promising methodology for analog circuit synthesis. However, the sequential nature of the Bayesian optimization framework significantly limits its ability to fully utilize real-world computa... 详细信息
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Serpentine Si nanowire biosensor for digital sensing of single virus  21
Serpentine Si nanowire biosensor for digital sensing of sing...
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21st International Conference on Miniaturized systems for Chemistry and Life Sciences, MicroTAS 2017
作者: Zang, Pengyuan Liang, Yuchen Wang, Honglei Tao, Jun Zeng, Xuan Zhou, Dian Hu, Walter Dept. of ECE University of Texas at Dallas RichardsonTX75080 United States ASIC and System State-Key Lab Microelectronics Department Fudan University Shanghai200433 China
We report a digital biosensing method by counting the individual binding events of single analyte using a Si nanowire (NW) biological field effect transistor (BioFET). Because the detection is no longer based on the a... 详细信息
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An efficient asynchronous batch Bayesian optimization approach for analog circuit synthesis
arXiv
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arXiv 2021年
作者: Zhang, Shuhan Yang, Fan Zhou, Dian Zeng, Xuan State Key Lab of ASIC & System School of Microelectronics Fudan University Shanghai China Department of Electrical Engineering University of Texas at Dallas RichardsonTX United States
In this paper, we propose EasyBO, an Efficient ASYnchronous Batch Bayesian Optimization approach for analog circuit synthesis. In this proposed approach, instead of waiting for the slowest simulations in the batch to ... 详细信息
来源: 评论
Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process
Bayesian Optimization Approach for Analog Circuit Design Usi...
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IEEE International Symposium on Circuits and systems
作者: Jiangli Huang Shuhan Zhang Cong Tao Fan Yang Changhao Yan Dian Zhou Xuan Zeng State Key Lab of ASIC & System School of Microelectronics Fudan University China Department of Electrical Engineering University of Texas at Dallas Richardson TX U.S.A
In this paper, we propose an efficient Bayesian optimization approach for analog circuit synthesis based on the multi-task Gaussian process model. Instead of building the Gaussian process models separately for each ci... 详细信息
来源: 评论