A low-power real-time DC removal circuit for PPG readout is proposed. A moving average filter is used to extract real-time DC voltage. Four sampling capacitors are used, three of which are used for storing the sampled...
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We demonstrate a network node with two-hop transmission and all-optical label swapping for an O-OFDM 16QAM payload at 1.2Tb/s and an OOK label at 12.5Gb/s. The overall OSNR penalty after label swapping and cascaded tr...
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A WDM PON(wavelength-division-multiplexed passive optical network) structure using 40Gb/s FSK signal for downstream transmission and 10Gb/s orthogonal FSK/ASK re-modulated signal for upstream transmission is demonstra...
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In this paper, all-optical OFDM transmitter and receiver with 5x20Gbit/s were simulated. The 100-Gbits/s signal was successfully transmitted over 40-km-SMF without dispersion companion in the simulation experiment. We...
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Single-carrier frequency domain equalization (SC-FDE), as a mature technique in wireless commutation, is widely researched for signal equalization and compensation utilizing high speed electronic devices such as DSP. ...
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In this paper, a novel and simple all-optical scheme for generating UWB monocycle pulses based on the nonlinear polarization rotation in an SOA is proposed and experimentally demonstrated. UWB spectrum generated from ...
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We theoretically and numerically analyze the multi-carriers generation scheme based on only integrated IQ modulator. Flat and stable 11 carriers are obtained and 112Gb/s PM-QPSK experiment over a single subcarrier has...
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This paper presents a 6-bit 800MS/s successive approximation register (SAR) analog-to digital converter (ADC) in 28nm CMOS with grouped digital-to-analog converter (DAC) capacitor array. High-speed operation is achiev...
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The normalization of the fingerprint is an essential and important step in fingerprint enhancement, and its implementation needs some high speed dividers of different lengths and precisions. However, traditional divis...
The normalization of the fingerprint is an essential and important step in fingerprint enhancement, and its implementation needs some high speed dividers of different lengths and precisions. However, traditional division algorithm used many subtractions to get the result, and fix-point operations should also be implemented when either the divisor or the dividend is decimal, which both make the computation time consuming. A modified divider with adjustable precision and length based on Verilog is proposed in this paper. It can process both integer and decimal with any given precision conveniently, and its pipeline structure is also very useful to execute serials output of fingerprint data, which is very attractive to the normalization of the fingerprint. The paper described its operation and the data structure in detail, and the simulation result indicates that the velocity of the divider is quicker than other dividers, and it decreases the computation times efficiently.
In this work, we have explored the automatic design of an operational amplifier using multi-objective optimization technique. The design parameters of the circuit, including transistor sizes, bias current and load cap...
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