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IEEE International Conference on Solid-state and Integrated Circuit Technology

作者： Zheng-Jun Hu Xin-Ping Qu Hong Lin Qing-Yun Zuo Wei-Jun Wang Ming Li Shou-Mian Chen Yu-Hang Zhao Shanghai IC R&D Center Shanghai China State key lab of ASIC and system School of microelectronics Fudan University Shanghai China

In this paper, barrier and seed process with physical vapor deposition (PVD) methods for Cu interconnect were developed for the 28 nm node generations. We show that metal filling can be improved by optimizing the seed process. Under non-optimized condition, metal diffusion can be observed, which is mainly caused by the resputter steps during PVD. By increasing the barrier thickness, the metal diffusion can be eliminated. In these demonstrations, we measure the electrical characteristics, including metal line resistance and line leakage (<10 pA).

关键词： PVD optimizing seed process

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Observation of Contact Resistivity Independence from Schottky Barrier Height on Heavily Doped P-type SiGe 13

Observation of Contact Resistivity Independence from Schottk...

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2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Jian Zhang H.Yu M Schaekers N.Horiguchi Lin-Lin Wang Yu-Long Jiang State Key Lab of ASIC and System School of Microelectronics Fudan University Imec

ISBN: (纸本)9781467397209

The electrical characteristics of Ti/p-Si Ge contacts with Ti thicknesses of 3nm and 5nm have been investigated in this paper. Ti N was used as a cap layer on Ti. It is observed that as Ti film becomes thinner, Ti/pSi Ge contact resistivity(ρ) increases, but its Schottky barrier height(SBH) decreases, which does not coincide with the regular ρc-SBH dependence. Using Ti N/p-Si Ge as a control sample, it is concluded that when Ti film is thinned down to nm scale, the contact property is strongly influenced by Ti N cap layer.

关键词： Estimation Field programmable gate arrays OFDM Modulation Filtration Clocks Signal processing algorithms

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A Reconfigurable Block Cryptographic Processor Based on VLIW Architecture

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China Communications 2016年第1期13卷 91-99页

作者： LI Wei ZENG Xiaoyang NAN Longmei CHEN Tao DAI Zibin State Key Lab of ASIC and System Fudan University Shanghai 200240 China Institute of Information Science and Technology Zhengzhou 450001 China

An Efficient and flexible implementation of block ciphers is critical to achieve information security *** implementation methods such as GPP,FPGA and cryptographic application-specific asic provide the broad range of ***,these methods could not achieve a good tradeoff between high-speed processing and *** this paper,we present a reconfigurable VLIW processor architecture targeted at block cipher processing,analyze basic operations and storage characteristics,and propose the multi-cluster register-file structure for block *** for the same operation element of block ciphers,we adopt reconfigurable technology for multiple cryptographic processing units and interconnection *** proposed processor not only flexibly accomplishes the combination of multiple basic cryptographic operations,but also realizes dynamic configuration for cryptographic processing *** has been implemented with0.18μm CMOS technology,the test results show that the frequency can reach 350 *** power consumption is 420 *** kinds of block and hash ciphers were realized in the *** encryption throughput of AES,DES,IDEA,and SHA-1 algorithm is1554 Mbps,448Mbps,785 Mbps,and 424 Mbps respectively,the test result shows that our processor's encryption performance is significantly higher than other designs.

关键词： Block Cipher VLIW processor reconfigurable application-specific instruction-set

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VLSI Implementation for R-wave Detection and Heartbeat Classification of ECG Adaptive Sampling Signals 13

VLSI Implementation for R-wave Detection and Heartbeat Class...

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2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Qian Long Yi Ren Jun Han Xiaoyang Zeng State Key lab of ASIC & System.Fudan University

ISBN: (纸本)9781467397209

Heartbeat classification and R-wave location have been widely used to detect people's health condition. And battery-power devices are mainly applied to wearable scenario, which can monitor people's health all day long, so high energy efficiency is very important under such circumstance. This paper proposes an improved DWT(Discrete Wavelet Transform) algorithm to obtain time-frequency characteristics of adaptive sampling ECG signals to locate the R-waves and compute RR-intervals, and further applies KNN(K-Nearest Neighbor) as a classifier to classify heartbeats, then presents a power-efficient VLSI architecture for the proposed algorithms. Experiments with the MIT-BIH Database show that the proposed DWT algorithm obtains Se(sensitivity) of 96.29% and Pp(positive predictive) of 90.26% compared to 66.44% and 70.43% respectively by the original DWT algorithm under noise level of SNR=*** the accuracy of the heartbeat classification is 87.7%. The VLSI is implemented using SMIC 65 nm CMOS technology and the power consumption is 112.7 ? W at 2 alternate frequencies of 60 and 360 Hz.

关键词： DWT Section KNN ECG VLSI Implementation for R-wave Detection and Heartbeat Classification of ECG Adaptive Sampling Signals

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Room-temperature continuous-wave operation of organometal halide perovskite lasers

arXiv

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arXiv 2018年

作者： Li, Zhitong Moon, Jiyoung Gharajeh, Abouzar Haroldson, Ross Hawkins, Roberta Hu, Walter Zakhidov, Anvar Gu, Qing Department of Electrical and Computer Engineering Department of Material Science and Engineering Department of Physics University of Texas at Dallas RichardsonTX75080 United States ASIC and System State-key Lab Institute of Microelectronics Fudan University Shanghai200433 China Department of Nanophotonics and Metamaterials ITMO University St. Petersburg Moscow Russia

Solution-processed organic-inorganic lead halide perovskites have recently emerged as promising gain media for tunable semiconductor lasers. However, optically pumped continuous-wave lasing at room temperature - a prerequisite for a laser diode - has not been realized so far. Here, we report lasing action in a surface emitting distributed feedback methylammonium lead iodide (MAPbI3) perovskite laser on silicon substrate, at room temperature under continuous-wave optical pumping. This outstanding performance is achieved because of the ultra-low lasing threshold of 13 W/cm2, which is enabled by thermal nanoimprint lithography that directly patterns perovskite into a high Q cavity with large mode confinement, while at the same time improves perovskite's emission characteristics. Our results represent a major step toward electrically pumped lasing in organic and thin-film materials, as well as the insertion of perovskite lasers into photonic integrated circuits for applications in optical computing, sensing and on-chip quantum information. Copyright © 2018, The Authors. All rights reserved.

关键词： Perovskite

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A highly efficient reconfigurable rotation unit based on an inverse butterfly network

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Frontiers of Information Technology & Electronic Engineering 2017年第11期18卷 1784-1794页

作者： Chao MA Zi-bin DAI Wei LI Hai-juan ZANG Department of Electrical Engineering Zhengzhou Institute of Information Science and Technology Zhengzhou 450004 China State Key Lab of ASIC and System Fudan University Shanghai 200240 China School of Computer Engineering Jiangsu University of Technology Changzhou 213001 China

We propose a reeonfigurable control-bit generation algorithm for rotation and sub-word rotation operations. The algorithm uses a self-routing characteristic to configure an inverse butterfly network. In addition to being highly parallelized and inexpensive, the algorithm integrates the rotation-shift, bi-directional rotation-shift, and sub-word rotation-shift operations. To our best knowledge, this is the first scheme to accommodate a variety of rotation operations into the same architecture. We have developed the highly efficient reconfigurable rotation unit （HERRU） and synthesized it into the Semiconductor Manufacturing International Corporation （SMIC）＇s 65-nm process. The results show that the overall efficiency （relative areaxrelative latency） of our HERRU is higher by at least 23% than that of other designs with similar functions. When executing the bi-directional rotation operations alone, HERRU occupies a significantly smaller area with a lower latency than previously proposed designs.

关键词： Rotation operations Self-routing Control-bit generation algorithm Inverse butterfly network

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Reconfigurable GF(2～8) Multipliers for Symmetric Cryptograms Based on Different Design Principals 13

Reconfigurable GF(2～8) Multipliers for Symmetric Cryptogram...

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2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Wang Zhou-Chuang Li Wei Dai Zi-Bin Nan Long-Mei Chuan Xin Institute of Information Science and Technology State Key Lab of ASIC and System Fudan University

ISBN: (纸本)9781467397209

This paper has researched the theory and design principle of GF(2～8) multiplication which i widely applied in symmetric cryptograms. With th principles in mind, three kinds of reconfigurabl multipliers based on x time, xm modular and produc separately have been implemented and their merits and demerits also have been investigated. Having analyzed the mix-column and reverse mix-column transformation the reconfigurable structure for GF(2～8) is proposed According to these different design principles, thei corresponding throughputs and other performance ar evaluated, and the results show that the reconfigurabl GF(2～8) multipliers can quickly realize large amount o encrypt data.

关键词： Galois field reconfigurable computing cryptogram polynomial

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Frequency dependence of performance in Ge negative capacitance PFETs achieving sub-30 mV/decade swing and 110 mV hysteresis at MHz

Frequency dependence of performance in Ge negative capacitan...

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International Electron Devices Meeting (IEDM)

作者： Jiuren Zhou Jibao Wu Genquan Han Ruoying Kanyang Yue Peng Jing Li Hongjuan Wang Yan Liu Jincheng Zhang Qing-Qing Sun David Wei Zhang Yue Hao State Key Discipline Lab of Wide Band Gap Semiconductor Technology Xidian University China State Key Laboratory of ASIC and System Fudan University China

ISBN: (纸本)9781538635605;9781538635599

We report the first investigation of frequency dependence of performance in Ge HfZrO x (HZO) negative capacitance (NC) pFETs. For Ge NC pFETs with internal gate [Fig. 1(b)], pulse measurement produces the significant increase in hysteresis compared to the DC measurement, but devices still remains sub-60 mV/decade subthreshold swing (SS). Ge NC pFETs without internal gate [Fig. 1(c)] show the little dependence of hysteresis, SS, and capacitance characteristics on pulse measurement (from DC to 1 μs). Ge NC pFET without internal gate achieves sub-30 mV/decade SS and 110 mV hysteresis with 1 ¡is pulse measurement, and significant peak in gate capacitance due to the NC effect at MHz. The different frequency dependences of performance in NC devices with and without internal gate might be attributed to the difference in the magnitude of gate leakage currents.

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Lightweight Network-on-Chip Router on Research and Design 13

Lightweight Network-on-Chip Router on Research and Design

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2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Yi-Ran Du Wei Li Zi-Bin Dai Zhengzhou Institute of Information Science and Technology State Key Lab of ASIC and System Fudan University

ISBN: (纸本)9781467397209

In order to solve the repeated design of No C router, this paper proposed a lightweight No C router after a study of No C's characteristics and Operating mode. In the low frequency data interaction application, the proposed router has a high cost performance. It can be mapped in a variety of No C topology by changing the number of each internal module and that will help to reduce the design cycle of multi-core No C system. At the same, the maximum data throughput is 703.3Gbps, it can effectively meet the demand of data interaction in No C.

关键词： Lightweight Network-on-Chip Router on Research and Design

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The improvement of the processes of a class of graph-cut-based image segmentation algorithms

The improvement of the processes of a class of graph-cut-bas...

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作者： Niu, Shengxiao Chen, Gengsheng State Key Lab of ASIC and System Fudan University Shanghai201203 China

In this paper, an analysis of the basic process of a class of interactive-graph-cut-based image segmentation algorithms indicates that it is unnecessary to construct n-links for all adjacent pixel nodes of an image before calculating the maximum flow and the minimal cuts. There are many pixel nodes for which it is not necessary to construct n-links at all. Based on this, we propose a new algorithm for the dynamic construction of all necessary n-links that connect the pixel nodes explored by the maximum flow algorithm. These n-links are constructed dynamically and without redundancy during the process of calculating the maximum flow. The Berkeley segmentation dataset benchmark is used to prove that this method can reduce the average running time of segmentation algorithms on the premise of correct segmentation results. This improvement can also be applied to any segmentation algorithm based on graph cuts. © Copyright 2016 The Institute of Electronics, Information and Communication Engineers.

关键词： Pixels

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