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检索条件"机构=ASIC and System State-Key Lab"

共 810 条记录，以下是231-240 订阅

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The improvement of the processes of a class of graph-cut-based image segmentation algorithms

The improvement of the processes of a class of graph-cut-bas...

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作者： Niu, Shengxiao Chen, Gengsheng State Key Lab of ASIC and System Fudan University Shanghai201203 China

In this paper, an analysis of the basic process of a class of interactive-graph-cut-based image segmentation algorithms indicates that it is unnecessary to construct n-links for all adjacent pixel nodes of an image before calculating the maximum flow and the minimal cuts. There are many pixel nodes for which it is not necessary to construct n-links at all. Based on this, we propose a new algorithm for the dynamic construction of all necessary n-links that connect the pixel nodes explored by the maximum flow algorithm. These n-links are constructed dynamically and without redundancy during the process of calculating the maximum flow. The Berkeley segmentation dataset benchmark is used to prove that this method can reduce the average running time of segmentation algorithms on the premise of correct segmentation results. This improvement can also be applied to any segmentation algorithm based on graph cuts. © Copyright 2016 The Institute of Electronics, Information and Communication Engineers.

关键词： Pixels

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A Low-complexity FFT Processor using Two-Dimensional Algebraic Integer Encoding 13

A Low-complexity FFT Processor using Two-Dimensional Algebra...

引用

2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Sangho Yun Fan Wu Gerald E.Sobelman Xiaofang Zhou Department of Electrical and Computer Engineering University of Minnesota State Key Lab of ASIC and System Fudan University

ISBN: (纸本)9781467397209

An efficient architecture of a 64-point FFT processor using two-dimensional algebraic integer(AI) encoding is presented. The advantage of two-dimensional AI encoding is that the hardware complexity for multiplication is reduced since a multiplication can be replaced by a few simple shifts and additions. The ROMless FFT processor, which replaces the ROM for twiddle factors with a twiddle factor generator(TFG)using 2-D AI encoding, has less hardware complexity than previous implementations. The proposed architecture uses a wordlength of 14 bits to achieve an acceptable SNR. It has been synthesized onto an FPGA, and comparative resource utilization results are presented.

关键词： FFT/IFFT AIQ WLAN OFDM

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ELECTRICAL PROPERTIES OF ORGANIC FIELD-EFFECT TRANSISTORS BASED ON RIBBON-LIKE TIPS-PENTACENE CRYSTALS 13

ELECTRICAL PROPERTIES OF ORGANIC FIELD-EFFECT TRANSISTORS BA...

引用

2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Wei-Bo Chen Jian Zhang Yu-Long Jiang Guo-Dong Zhu State Key Lab of ASIC and System School of Microelectronics Fudan University Department of Material Science Fudan University

ISBN: (纸本)9781467397209

By the droplet-pinned crystallization method organic field-effect transistors with good device performance were fabricated based on ribbon-like TIPS-pentacene crystals The electrical property of OFETs with ribbon-like TIPS-pentacene crystals developed by differen concentration solutions is investigated. It is revealed tha large and highly textured crystals tended to result in high mobility and small electrical hysteresis window.

关键词： ELECTRICAL PROPERTIES OF ORGANIC FIELD-EFFECT TRANSISTORS BASED ON RIBBON-LIKE TIPS-PENTACENE CRYSTALS

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A Compact and Efficient Architecture for Elliptic Curve Cryptographic Processor 13

A Compact and Efficient Architecture for Elliptic Curve Cryp...

引用

2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Su-Wen Yi Wei Li Zi-Bin Dai Jun-Wei Liu Zhengzhou Institute of Information Science and Technology State Key Lab of ASIC and System Fudan University

ISBN: (纸本)9781467397209

In this paper, a dual-field elliptic curve cryptographic processor is proposed to support arbitrary curves within576-bit in dual field. Besides, two heterogeneous function units are coupled with the processor for the parallel operations in finite field based on the analysis of the characteristics of elliptic curve cryptographic algorithms. To simplify the hardware complexity, the clustering technology is adopted in the processor. At last a fast Montgomery modular division algorithm and its implementation is proposed based on the Kaliski's Montgomery modular inversion. Using UMC 90-nm CMOS 1P9 M technology, the proposed processo occupied 0.86-mm can perform the scalar multiplication in 0.34 ms in GF(p) and 0.22 ms in GF(2)respectively. Compared to other elliptic curve cryptographic processors, our design is advantageous in hardware efficiency and speed moderation.

关键词： A Compact and Efficient Architecture for Elliptic Curve Cryptographic Processor Montgomery

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The W Oxidation Time Effect on Resistive Switching Speed in AlOx/WOx-based RRAM 13

The W Oxidation Time Effect on Resistive Switching Speed in ...

引用

2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Juan Xu Jianguo Yang Yanqing Zhao Yarong Fu Ryan Huang Qingtian Zhou Jingang Wu Yinyin Lin ASIC and System State Key Lab Fudan University SOC Technology Development Center Semiconductor Manufacturing International Corp

ISBN: (纸本)9781467397209

We have proposed two algorith ms to demonstrate the relationship between W oxidation time and switching speed in this paper. The de monstration is carried out on a 128 Kb test macro of A lO x/WOx bi-layer RRAM wh ich was fabricated with 0.18μm standard logic process. Increasing the W oxidation time properly could achieve a faster switching speed while the overmuch o xidation time will result in performance decreasing. In addition to the switching speed, the oxidation time has no obvious effect on Ron and forming success rate. The typical R/R resistive window is about 1000 X in our work.

关键词： The W Oxidation Time Effect on Resistive Switching Speed in AlOx/WOx-based RRAM

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An Improved Ziggurat-Based Hardware Gaussian Random Number Generator 13

An Improved Ziggurat-Based Hardware Gaussian Random Number G...

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2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Jianing Su Jun Han Advanced Circuit and System Lab Suzhou Institute of Nano-tech and Nano-Bionics Chinese Academy of Sciences ASIC & System State Key Lab Department of Microelectronics Fudan University

ISBN: (纸本)9781467397209

The Ziggurat algorithm is an efficient way for building a Gaussian random number generator(GRNG), which is useful in many scientific and engineering applications. As the classic ziggurat-based GRNG includes nonlinear operations in judging the wedge and tail regions, which is complicated and resource consuming. An improved ziggurat algorithm is proposed by optimizing the accepting model with piecewise linear fitting, replacing the nonlinear operations with linear ones. The improved GRNG works with a 33% decrease of resource and has no significant performance loss. In addition, the uniform random number generator(URNG) in GRNG is implemented by metastability-based ring oscillators with XOR trees, which is the state-of-the-art technique for generating true random numbers in fully digital ways. FPGA results show that the proposed GRNG generates good normal distribution samples with a smooth power spectrum.

关键词： ziggurat random number generator piecewise linear fitting metastability-based ring oscillators

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A Threshold Voltage Model for GaN-Based Heterostructure-Free Normally-Off FinFET 13

A Threshold Voltage Model for GaN-Based Heterostructure-Free...

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2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Haisheng Qian Guangxi Hu Ran Liu Lirong Zheng Xing Zhou ASIC and System State Key Lab School of Information Science and Technology Fudan University School of Electrical & Electronic Engineering Nanyang Technological University

ISBN: (纸本)9781467397209

An analytical model for threshold voltage of the normally-off Ga N-based fin-shaped field-effect transistor(Fin FET) is obtained. Analytical expressions for the threshold voltage and its roll-off effect are *** design insights can be obtained from the results. The explicit expression for threshold voltage makes the model suitable to be embedded in circuit simulation and design tools.

关键词： VDS A Threshold Voltage Model for GaN-Based Heterostructure-Free Normally-Off FinFET GaN Model

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A High Speed SoftMax VLSI Architecture Based on Basic-Split

A High Speed SoftMax VLSI Architecture Based on Basic-Split

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IEEE International Conference on Solid-state and Integrated Circuit Technology

作者： Qiwei Sun Zhixiong Di Zhengyang Lv Fengli Song Qianyin Xiang Quanyuan Feng Yibo Fan Xulin Yu Wenqiang Wang School of Information Science and Technology Southwest Jiaotong University Sichuan China Institute of Microelectronics Southwest Jiaotong University Sichuan China State Key Lab of ASIC & System Fudan University Shanghai China Alibaba Group Hangzhou Zhejiang China

Due to simple to calculate and derivate, SoftMax is widely used in neural network computing as an activation function. But how to guarantee the accuracy and speed while minimizing the consumption of hardware resources is the most critical issue in the current SoftMax hardware design. The available Polynomial Fitting and CORDIC are contradictory in resource occupancy and accuracy. To meet the need of SoftMax, this paper proposes a new method named Basic-Split Calculation. Taking advantage of the math feature of exponential function, the Basic-Split Calculation method splits the exponentiation calculation of the SoftMax into several specific basics which is implemented by look-up table. Based on this strategy, the complex exponential calculation process is implemented by look-up table procedure and multiply operation. It simplify the hardware complexity and logic propagation delay remarkably. Experiment results show that the actual error rate is 10~(-8) magnitude. And, synthesis report based on SMIC65nm technology library show that, the operation frequency can be up to 1GHz. Compared with the existing design. Basis-Split Calculation method has a lot of advantages, such as faster calculation speed, higher accuracy, larger throughput.

关键词： CORDIC contradictory VLSI

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An SVA Hardware Monitor with Off-line Replay 13

An SVA Hardware Monitor with Off-line Replay

引用

2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Minwoo Nho Xiaofang Zhou Gerald E.Sobelman Samsung Electronics Co. Ltd. State Key Lab of ASIC and System Fudan University Department of Electrical and Computer Engineering University of Minnesota

ISBN: (纸本)9781467397209

With the help of assertion based verification, engineers nowadays can check a digital design against its specification more easily and precisely. What's more,assertion descriptions can be synthesized into hardware,which makes post-fab on-line monitor possible. But most of the paper does not consider waveform capture and off-line replay features that can help engineers further analyze captured waveforms. In this paper, an assertion based hardware monitor with off-line replay is *** SAV to RTL generator is described.

关键词： Assertion SVA Compiler on-line Monitor off-line replay

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Electrical Impedance and Radiation Modes Determination for LiNbO3 MEMS Ultrasonic Array Transducer using KLM and FEM Modelling 13

Electrical Impedance and Radiation Modes Determination for L...

引用

2016 13th IEEE International Conference on Solid-state and Integrated Circuit Technology (ICSICT)

作者： Wei-Zhen Wang Wei-Jiang Xu Jia Zhou Wen-Juan Liu Zheng Xu Jun-Yan Ren State Key Lab of ASIC and System School of Microelectronics Fudan University IEMN-DOAE UMR CNRS 8520 Université de Valenciennes Institute of Acoustics Tongji University

ISBN: (纸本)9781467397209

In MEMS realization of high frequency ultrasonic array transducer, electrical impedance matching may become difficult for the reason of the miniaturization of the piezo-array elements. In this study, the electrical impedance of the array elements is estimated first by using KLM model, and then calculated by using finite elements method(FEM), in the case of a Li Nb O3 based30 MHz array transducer. The impedance frequency behavior is related both to the eigen-resonance modes and the electrode driven modes with the free mechanical boundary condition of the element and to the coupling of these modes to the array structure when the element being integrated as the transducer. The array transducer properties and performances such as lateral modes,crosstalk, sensibility and bandwidth, field radiation,focusing/steering are also simulated and analyzed.

关键词： Electrical Impedance and Radiation Modes Determination for LiNbO3 MEMS Ultrasonic Array Transducer using KLM and FEM Modelling FEM

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