A novel method for SRAM cell standby leakage measurement is presented, which enables accurate testing and decoupling of sub-threshold leakage (I-sub), gate leakage (I-gate) and junction leakage (I-junc) in each SRAM c...
详细信息
This paper analyzes the effect of channel gains on the performance of signal detection in multiple-input multiple-output (MIMO) systems, and based on that proposes an intelligent MIMO signal detection algorithm. It dy...
详细信息
A 2-Mb resistive random access memory (ReRAM) is demonstrated in 0.13-um CMOS logic process. The paper describes the cell, chip architecture, and circuit techniques to ReRAM design;The 2-Mb ReRAM chip features three c...
详细信息
An ultra-low quiescent current low-dropout regulator with small output voltage variations and improved load regulation is presented in this paper. It makes use of dynamically-biased shunt feedback as the buffer stage ...
详细信息
An ultra-low quiescent current low-dropout regulator with small output voltage variations and improved load regulation is presented in this paper. It makes use of dynamically-biased shunt feedback as the buffer stage and the LDO regulator can be stable for all load conditions. The proposed structure also employs a momentarily current-boosting circuit to reduce the output voltage to the normal value when output is switched from full load to no load. The whole circuit is designed in a 0.18 μm CMOS technology with a quiescent current of 550 nA. The maximum output voltage variation is less than 20 mV when used with 1 μF external capacitor.
A specific and high-sensitive immunosensor for detecting pulmonary tuberculosis (TB) markers in human serum is presented by miniaturizing array of microelectrodes via micro electro-mechanical system (MEMS) for multi-c...
详细信息
Software Defined Radio (SDR) allows dynamically changing protocols and functions in order to provide flexible, multiple-standard services to users. A reconfigurable baseband architecture having a set of coarse-grained...
详细信息
The VLSI design of an MPEG audio decoder and decoding program is *** achieve the real-time decoding,an application specific digital signal processing(AS-DSP) core is *** practice of the hardware-software codesign meth...
详细信息
The VLSI design of an MPEG audio decoder and decoding program is *** achieve the real-time decoding,an application specific digital signal processing(AS-DSP) core is *** practice of the hardware-software codesign methodology greatly reduce the develop cycle to complete the whole *** optimization of decoding algorithm reduces the computational complexity and the cost of VLSI system.
Being an effective edge detector with single-pixel response, Canny operator has been widely used in accurately abstracting the edge information in image processing. However, taking its 4-step process into account,...
详细信息
Being an effective edge detector with single-pixel response, Canny operator has been widely used in accurately abstracting the edge information in image processing. However, taking its 4-step process into account, its real-time implementation based on CPU has become a significant problem, especially for the part of the edge tracing, which consumes a large amount of computing time. To solve the problem, GPU will be used in this paper for sake of its powerful ability of parallel processing while a new Canny operator is proposed with the introduction of parallel breakpoints detection and edge tracing without recursive operations. Experimental results show that, the improved Canny operator has obtained a high real-time performance of edge detection in image processing.
Coarse-Grained Reconfigurable Architecture (CGRA) is a domain-specific reconfigurable architecture. Generally, the CGRA architecture consists of IO, memory, coarse-grained processing element (PE), and interconnect. Us...
Coarse-Grained Reconfigurable Architecture (CGRA) is a domain-specific reconfigurable architecture. Generally, the CGRA architecture consists of IO, memory, coarse-grained processing element (PE), and interconnect. Usually, ALU in PE contains a relatively complete set of operations and most of the interconnects adopt neighbor-to-neighbor (N2N) [1], switch-based [2], and combination of the connection box and switch box (CB-SB) patterns [3]. However, the complex operation sets and switch-based/CB-SB fully-connected interconnects provide sufficient reconfigurability at the cost of resource overhead. Thus, it is important to build a parameterized architecture of CGRA to achieve a balance among hardware overhead, flexibility and performance through automatic design space exploration (DSE).
Deep ultraviolet(DUV)phototransistors are key integral of optoelectronics bearing a wide spectrum of applications in flame sensor,military detector,oil spill detection,biological sensor,and artificial intelligence ***...
详细信息
Deep ultraviolet(DUV)phototransistors are key integral of optoelectronics bearing a wide spectrum of applications in flame sensor,military detector,oil spill detection,biological sensor,and artificial intelligence *** order to further improve the responsivity of UV photodetectors based onβ-Ga_(2)O_(3),in present work,high-performanceβ-Ga_(2)O_(3) phototransistors with local back-gate structure were experimentally *** phototransistor shows excellent DUV photoelectrical performance with a high responsivity of 1.01×107 A/W,a high external quantum efficiency of 5.02×109%,a sensitive detectivity of 2.98×1015 Jones,and a fast rise time of 0.2 s under 250 nm ***,first-principles calculations reveal the decent stability ofβGa_(2)O_(3) nanosheet against oxidation and humidity without significant performance ***,the hexagonal boron nitride(h-BN)/β-Ga_(2)O_(3) phototransistor can behave as a photonic synapse with ultralow power consumption of~9.6 fJ per spike,which shows its potential for neuromorphic computing tasks such as facial ***β-Ga_(2)O_(3) phototransistor will provide a perspective for the next generation optoelectrical systems.
暂无评论