High-frequency ultrasonic transducer arrays are essential for efficient imaging in clinical analysis and nondestructive evaluation (NDE). However, the fabrication of piezoelectric transducers is really a great challen...
High-frequency ultrasonic transducer arrays are essential for efficient imaging in clinical analysis and nondestructive evaluation (NDE). However, the fabrication of piezoelectric transducers is really a great challenge due to the small features in an array. A novel technique is presented to fabricate thick-film ZnO ultrasonic array transducers. Piezoelectric elements are formed by sputtering thick-film ZnO onto etched features of a silicon substrate so that the difficult etching process for ZnO films is avoided by etching silicon. This process is simple and efficient. A 13-μm-pitch ZnO sandwich array is achieved with a thickness of 8 μm for 300 MHz. Finite element method is employed to simulate the wave propagation in water based on this new transducer configuration. The acoustic field results indicate this configuration has an acceptable performance. A potential application is proposed based on integration with microfluidics.
Being an effective edge detector with single-pixel response, Canny operator has been widely used in accurately abstracting the edge information in image processing. However, taking its 4-step process into account, its...
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This paper presents a statistical method to build up interconnect timing library of static timing analysis for FPGA design. To overcome a large number of negative values in the traditional interconnect timing library,...
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Power amplifier drivers for software-define radio (SDR) transmitter with large gain tuning range are presented. The drivers can work with WCDMA/GSM protocol. Dynamic power control method is adopted to increase the eff...
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This paper presents a security processor based on MIPS 4KE architecture which extends security functions of AES and ECC. Due to the different features of AES and ECC encryptions, two dedicated hardware units are emplo...
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To enhance security in WLAN, CCMP is introduced in IEEE 802.11i. This paper presents a heterogeneous multi-core architecture based on NoC to support high-speed CCMP application. Four general processors and twelve secu...
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A new LUT and carry structure embedded in the configurable logic block of FPGA is proposed. The LUT is designed to support both 4-input and 5-input structures, which can be configured by users according to their needs...
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There is a growing tendency for FPGA (Field Programmable Gate Array) IP (Intellectual Property) cores to be embedded in an SOC (system On a Chip). The embedded FPGA cores can improve the flexibility of the SOC chip. H...
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This paper presents an implementation of channel estimation for LTE downlink MIMO system on a multi-core processor platform. With the development of wireless communication, it is gradually difficult for asic baseband ...
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A novel current-mode bandgap reference (BGR) with second-order temperature compensation is presented. The proposed bandgap reference adopts a novel structure, which takes advantage of the complementarity of second-ord...
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