In this paper, a hardware/software co-design approach is proposed to parse the video bitstream which conforms to various video compression standards. The layered structure of the syntax elements in video bitstreams is...
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A novel bandgap reference (BGR) with ultra low supply voltage is presented. The proposed bandgap reference uses subthreshold MOSFETs to provide temperature compensation. Analysis and comparison between proposed bandga...
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Adaptive support-weight algorithm can generate high quality disparity map for stereo matching. But due to the complexity, it requires large internal memory size and bandwidth to meet the real-time constraint. In this ...
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This paper presents a high performance design for Context-Based Adaptive Variable Length-Coding (CAVLC) used in the H.264/AVC standard. To reduce the cycles of processing one macroblock (MB), a two-stage residual enco...
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A hardware/software co-processing system for speech recognition applications is proposed in this paper. The system consists of a soft-core microprocessor and a dedicated hardware accelerator implemented on an FPGA. Th...
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Highly integrated contemporary SRAM-based Field Programmable Gate Arrays (FPGAs) lead to high occurrence-rate of transient faults induced by Single Event Upsets (SEUs) in FPGAs' configuration memory. In this paper...
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An important trend of the modern mobile device is that a single user terminal that will be capable of receiving signals of multiple different transmission standards. Most of these transmission standards employ a forwa...
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The origin of the on-state current (Ion) difference between dopant-segregated Schottky (DSS) source/drain MOSFET and conventional MOSFET with 20nm channel length is investigated by device simulation. The simulation re...
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The normalization of the fingerprint is an essential and important step in fingerprint enhancement, and its implementation needs some high speed dividers of different lengths and precisions. However, traditional divis...
The normalization of the fingerprint is an essential and important step in fingerprint enhancement, and its implementation needs some high speed dividers of different lengths and precisions. However, traditional division algorithm used many subtractions to get the result, and fix-point operations should also be implemented when either the divisor or the dividend is decimal, which both make the computation time consuming. A modified divider with adjustable precision and length based on Verilog is proposed in this paper. It can process both integer and decimal with any given precision conveniently, and its pipeline structure is also very useful to execute serials output of fingerprint data, which is very attractive to the normalization of the fingerprint. The paper described its operation and the data structure in detail, and the simulation result indicates that the velocity of the divider is quicker than other dividers, and it decreases the computation times efficiently.
High-frequency ultrasonic transducer arrays are essential for high resolution imaging in clinical analysis and Non-Destructive Evaluation (NDE). However, the structure design and fabrication of the kerfed ultrasonic a...
High-frequency ultrasonic transducer arrays are essential for high resolution imaging in clinical analysis and Non-Destructive Evaluation (NDE). However, the structure design and fabrication of the kerfed ultrasonic array is quite challenging when very high frequency (≥ 100 MHz) is required. Inductively Coupled Plasma (ICP) deep etching process is used to etch 36°/Y-cut lithium niobate (LiNbO3) crystals. Furthermore, a finite element tool, COMSOL, is employed to calculate the electrical properties of the arrays, including crosstalk effect and electrical impedance. At last, arrays with a pitch of 40 μm are fabricated and characterized by a network analyzer. The measured results agree well with the theoretical predictions.
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