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A novel method to fabricate full-kerfed highfrequency (>100 MHz) ultrasonic array transducers

A novel method to fabricate full-kerfed highfrequency (>100 ...

引用

2011 IEEE International Ultrasonics Symposium, IUS 2011

作者： Zhang, J.Y. Ji, X.M. Zhou, J. Huang, Y.P. Xu, W.J. Carlier, J. Gao, J.M. Nongaillard, B. ASIC and System State Key Lab. Department of Microelectronics Fudan University Shanghai 200433 China Département Opto-Acousto-Electronique I.E.M.N. Université de Valenciennes Mont Houy BP311 59313 Valenciennes France

ISBN: (纸本)9781457712531

High-frequency ultrasonic transducer arrays are essential for efficient imaging in clinical analysis and nondestructive evaluation (NDE). However, the fabrication of piezoelectric transducers is really a great challenge due to the small features in piezoelectric films. This paper describes a novel technique to fabricate thick-film ZnO ultrasonic array transducers. Piezoelectric elements are formed by sputtering thick-film ZnO onto etched features of a silicon substrate so that the difficult etching process for ZnO films is avoided by etching silicon. This process is simple and efficient. A 13-μm-pitch ZnO sandwich array is achieved with a thickness of 8 μm for 300 MHz. Finite element method is employed to calculate its electrical properties, including electrical impedance and crosstalk. The array is characterized by a network analyzer. The measured results are in good agreement with the theoretical predictions. © 2011 IEEE.

关键词： Thick films

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Novel RRAM Programming Technology for Instant-on and High-security FPGAs

Novel RRAM Programming Technology for Instant-on and High-se...

引用

2011 IEEE 9th International Conference on asic(2011年第九届IEEE国际专用集成电路大会)

作者： Xiaoyong Xue Wenxiang Jian Yufeng Xie Qing Dong Rui Yuan Yinyin Lin ASIC&System State Key Lab Dept. of Microelectronics Fudan University 825 Zhangheng Rd 201203 Shanghai China

This paper introduces a novel RRAM programming technology to improve the security arid shorten the startup time of FPGAs. A 9T2R nonvolatile SRAM (nvSRAM) cell is comprised of two 1T1R RRAM cells and a standard 6T SRAM cell on a single die by integrating the RRAM technology into the standard logic process. The 9T2R cell stores the configuration bit in the two 1T1R cells in complementary style and can quicky read it into the SRAM cell in less than 300 ps at power-on. Besides, the proposed RRAM programming technology excels SRAM in dynamic reconfiguration for less interrupt time or small area overhead. A testchip of a 2-input LUT with the proposed RRAM programming technology has been demonstated in 0.13μm logic technology.

关键词： Programming Logic gates Nonvolatile memory Field programmable gate arrays Switches

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Wideband Spectrum Sensing using the All-phase FFT

Wideband Spectrum Sensing using the All-phase FFT

引用

2011 IEEE 9th International Conference on asic(2011年第九届IEEE国际专用集成电路大会)

作者： Gerald E. Sobelman Lian Huai Xiaofang Zhou Department of Electrical and Computer Engineering University of Minnesota Minneapolis 55455 USA State Key Lab of ASIC and System Fudan University Shanghai China

Spectrum sensing is a key technology of cognitive radio. The goal of spectrum sensing in this context is to achieve a high detection probability in order to avoid causing interference to the primary licensed users: Among the methods available for spectrum sensing, energy detection has been widely applied in hardware implementations. However, since previous work has been based on the traditional FFT, the side leakage problem makes it difficult to detect a primary user adjacent to a strong signal. In this paper, we propose an all-phase FFT based wideband spectrum sensing processor. Simulation results show that it can increase the probability of detection of a primary user that is adjacent in frequency to a strong signal. It can also improve the receiver operating characteristic curve. Hardware implementation requirements are also given.

关键词： Cognitive radio spectrum sensing all-phase FFT energy detection.

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Optimization of Mixed Polarity Reed-Muller Expressions Based on Whole Annealing Genetic Algorithm

Optimization of Mixed Polarity Reed-Muller Expressions Based...

引用

2011 IEEE 9th International Conference on asic(2011年第九届IEEE国际专用集成电路大会)

作者： Meng Yang Hongying Xu State Key Lab of ASIC & System Fudan University Shanghai 201203 China Tianjin Vocational College of Mechanics and Electricity Tianjin 300131 China

This paper presents a Whole Annealing Genetic Algorithm (WAGA) to obtain a good circuit implementation among mixed polarity Reed-Muller expressions. By combining global searching ability of genetic algorithm and local searching ability of simulated annealing, WAGA could achieve fast convergence. Apart from genetic operators such as crossover operator and mutation operator are used in genetic algorithm stage, it uses annealing operator at annealing stage. At the annealing stage, WAGA forms an intermediate population by selecting 2/3 population from previous generation and 2/3 population from current generation. Annealing operator is then applied to the intermediate population. To achieve an efficient CPU utilization, the calculation of the cost function of WAGA is based on a parallel manner, in which newly generated terms are obtained at one time. The results of tested benchmark show that the algorithm is highly effective for searching the best polarity and achieves 13％ improvement on average in terms of CPU time.

关键词： Annealing Benchmark testing

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A 0.8ps Minimum-Resolution Sub-Exponent TDC for ADPLL in 0.13μm CMOS

A 0.8ps Minimum-Resolution Sub-Exponent TDC for ADPLL in 0.1...

引用

2011 IEEE 9th International Conference on asic(2011年第九届IEEE国际专用集成电路大会)

作者： Xiaolu Liu Na Yan Xi Tan Hao Min State Key Lab. of ASIC and System Dept. of Microelectronics Fudan University Room 365 825 Road Zhangheng Shanghai China 201203

This paper presents the design of a sub-exponent time-to-digital converter (TDC) that amplifies a time residue to improve both the time resolution and measurement range. The sub-exponent TDC quantizes the fractional time difference with a cascading chain of 2× time amplifiers. A digitally self-calibrated TA circuit is developed to achieve large input range and stable gain. Simulation results show that implemented in SMIC 0.13μm CMOS, the proposed TDC can achieve a minimum resolution of 0.8ps, a measurement range of 14bits, and a power dissipation of 2mW at 60MHz.

关键词： Time-to-digital converter all-digital PLL time amplifier

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A Robust Frame Synchronization Scheme For Broadband Power-line Communication

A Robust Frame Synchronization Scheme For Broadband Power-li...

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2011 IEEE 9th International Conference on asic(2011年第九届IEEE国际专用集成电路大会)

作者： Chen Chen Yuebin Huang Yizhi Wang Yun Chen Xiaoyang Zeng State Key Lab. of ASIC and System Dept. of Microelectronics Fudan University Room 220 825 Road ZhangHeng Shanghai China 201203

In this paper, several frame synchronization schemes is examined under the scenario of Broadband Powerline Communication (BPL) with their merits and demerits illustrated. A method, mainly based on algorithm proposed by Minn with modification, is proposed and simulated under channels proposed by Open PLC European Research Alliance (OPERA). Threshold is set according to simulations for frame synchronization as well as Physical Protocol Data Unit (PPDU) identification. The proposed estimator has a RMS (Root Mean Square) of start point estimation three orders lower at least in comparison with legacy Schmidl and Cox estimator. Optimization schemes are also proposed to increase the hardware efficiency for the estimator. As much as 75％ multiplications could be saved with only a slight degradation in estimation accuracy for the proposed estimator.

关键词： Broadband communication

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FFT Implementation with Multi-Operand Floating Point Units

FFT Implementation with Multi-Operand Floating Point Units

引用

2011 IEEE 9th International Conference on asic(2011年第九届IEEE国际专用集成电路大会)

作者： Dongge Wang Yuteng Pan Zhang Zhang Xiaofang Zhou Dan Wang Gerald E. Sobelman State Key Lab of ASIC and System Fudan University Shanghai 200433 China Department of Electrical and Computer Engineering University of Minnesota Minneapolis 55455 USA

In this paper we propose two new design techniques for floating point arithmetic units used in DSP applications, and apply them in the design of two multi-operand units for high-radix FFTs. These two multi-operand arithmetic units are a Modified two term Dot Product (MDP) unit and a Multi-operand AddSub unit (MAS). A radix-4* FFT butterfly computation block is implemented efficiently with these multioperand units. Synthesis results show that the butterfly unit built with our design is about 43％ faster and 9.5％ smaller than a conventional implementation.

关键词： Floating-point Arithmetic Radix-4 FFT Butterfly Multi-operand Floating-point operations.

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Dielectric Fresnel zone plates on optical fibers for micro-focusing applications

Dielectric Fresnel zone plates on optical fibers for micro-f...

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作者： Lu, Bing-Rui Li, Jin-Xing Guo, Hong-Bin Gao, Chen Huq, Ejaz Qu, Xin-Ping Chen, Yifang Liu, Ran State Key Lab of ASIC and System Fudan University No. 220 Handan Rd. Shanghai 200433 China Micro and Nanotechnology Centre Rutherford Appleton Laboratory Chilton Didcot Oxfordshire OX11 0QX United Kingdom School of Microelectronics Fudan University 220 Handan Road Shanghai China

In this paper, we present a novel fabrication technique for constructing light focusing lenses, dielectric Fresnel zone plates on both flat wafers and tips of plastic optical fibers (POFs). SU-8 zone plate structures are made on glass substrate by photolithography with ink-printed soft mask, and then used as the template for hot embossing on the tip of PMMA POF. Focusing behavior for both 472 and 633 nm laser beams and LEDs in different colors are observed on glass wafers and POF tips, indicating that the proposed dielectric Fresnel zone plates can be built onto both substrate by a direct hot embossing process which may lead to a high volume production at low cost. Light intensity measurement on POFs proves that light focusing is achieved while intensity is maintained. This structure is expected to have broad applications in micro-imaging, micro-focusing as well as point-of-care medical surgeries. © 2011 Elsevier B.V. All rights reserved.

关键词： Glass

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一种带有马刺线的微带带阻滤波器

一种带有马刺线的微带带阻滤波器

引用

2012毫米波亚毫米波会议

作者： ZENG Li 曾力 XIAO Peng-cheng 肖鹏程 XIONG You-fu 熊友符 GUO Xiao-jin 郭晓金 HUANG Jun 黄俊 Chongqing Key Laboratory of Signal and Information Processing Chongqing University of Posts and Tele 重庆邮电大学信号与信息处理重庆市重点实验室重庆400065 State Key Lab of ASIC&SYSTEM Fudan UniversityShanghai 200120P.R.China 复旦大学专用集成电路与系统国家重点实验室上海200120

提出了一种新的EBG单元结构,为了进一步提高带阻滤波器的带阻特性,还引入了马刺线的设计。仿真分析了基于该EBG单元结构设计的微带带阻滤波器传输特性与单元结构几何尺寸的关系,对比分析了带有马刺线和不带有马刺线的测试结果。研究结... 详细信息

提出了一种新的EBG单元结构,为了进一步提高带阻滤波器的带阻特性,还引入了马刺线的设计。仿真分析了基于该EBG单元结构设计的微带带阻滤波器传输特性与单元结构几何尺寸的关系,对比分析了带有马刺线和不带有马刺线的测试结果。研究结果表明,马刺线的引入可使滤波器阻带深度提高约45dB,5个EBG单元构成的带阻滤波器阻带深度达70dB,而通带特性基本不变。

关键词：带阻滤波器马刺线结构设计仿真分析

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Direct metal nano-patterning on irregular substrate surfaces by reversal imprint lithography

Direct metal nano-patterning on irregular substrate surfaces...

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IEEE International Nanoelectronics Conference

作者： Lu, Bing-Rui Qu, Xin-Ping Liu, Ran Chen, Yifang Wang, Yuanyuan State Key Lab. of Asic and System Department of Microelectronics Fudan University 220 Handan Road Shanghai 200433 China Micro and Nanotechnology Center Rutherford Appleton Laboratory Chilton Didcot Oxon OX11 0QX United Kingdom Department of Electronic Engineering Fudan University Shanghai 200433 China

ISBN: (纸本)9781457703799

We demonstrate a new direct metal patterning method to form nanoscale patterns on irregularly shaped substrates through a reversal imprint process, called Reversal Imprint Metal Transfer (RIMT). Using commonly processed nano patterns in resist after metal deposition before lift-off procedure, instead of being removed through lift-off, the metal on top of the resist is transferred to another irregular substrate such as a tip, a sidewall, an optic fiber and a glass wedge face by a reversal imprint. This method is able to improve the efficiency of nanolithography by smplying the whole processes, while realize the possibility to create metal patterns on irregular substrates which might be extremely difficult to be achieved by conventional lithography methods. © 2011 IEEE.

关键词： Metals

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